Datasheet > AM1806ZCEA4

AM1806ZCEA4

更新时间： 2022-12-19 11:05:17

品牌	Logo	应用领域
德州仪器 - TI		微处理器
页数	文件大小	规格书
241页	1437K
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AM1806 ARM Microprocessor

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AM1806ZCEA4 数据手册

AM1806

www.ti.com

SPRS658B–FEBRUARY 2010–REVISED MAY 2010

1.4 Functional Block Diagram

ARM Subsystem

JTAG Interface

System Control

ARM926EJ-S CPU

With MMU

PLL/Clock

Generator

w/OSC

Input

Clock(s)

4KB ETB

General-

Purpose

Timer (x3)

16KB

I-Cache

16KB

D-Cache

Power/Sleep

Controller

8KB RAM

(Vector Table)

RTC/

32-kHz

OSC

Multiplexing

64KB ROM

Switched Central Resource (SCR)

Peripherals

DMA

Audio Ports

Serial Interfaces

Display

Video

Parallel Port Internal Memory Customizable Interface

SPI

I C

UART

(x3)

EDMA3

(x2)

128KB

RAM

PRU Subsystem

McASP

w/FIFO

LCD

Ctlr

McBSP

(x2)

uPP

VPIF

(x2)

Control Timers

Connectivity

HPI

External Memory Interfaces

MMC/SD

(8b)

(x2)

USB2.0

OTG Ctlr

PHY

EMIFA(8b/16B)

DDR2/MDDR

NAND/Flash

Controller

ePWM eCAP

(x2)

(x3)

16b SDRAM

(1) Note: Not all peripherals are available at the same time due to multiplexing.

Figure 1-1. Functional Block Diagram

AM1806 ARM Microprocessor

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