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AM1802BZCED3 PDF预览

AM1802BZCED3

更新时间: 2024-01-04 17:31:22
品牌 Logo 应用领域
德州仪器 - TI 时钟双倍数据速率光电二极管外围集成电路
页数 文件大小 规格书
182页 1307K
描述
Sitara Processor: ARM9, LPDDR, DDR2, Ethernet 361-NFBGA -40 to 90

AM1802BZCED3 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:BGA包装说明:NFBGA-361
针数:361Reach Compliance Code:compliant
ECCN代码:3A991.A.2HTS代码:8542.31.00.01
Factory Lead Time:1 week风险等级:8.53
具有ADC:NO地址总线宽度:23
位大小:32最大时钟频率:30 MHz
DAC 通道:NODMA 通道:YES
外部数据总线宽度:16JESD-30 代码:S-PBGA-B361
JESD-609代码:e1长度:13 mm
湿度敏感等级:3I/O 线路数量:144
端子数量:361最高工作温度:90 °C
最低工作温度:-40 °CPWM 通道:NO
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装等效代码:BGA361,19X19,25封装形状:SQUARE
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:1.2,1.8,3.3 V认证状态:Not Qualified
ROM可编程性:FLASH座面最大高度:1.3 mm
速度:300 MHz子类别:Microprocessors
最大供电电压:1.32 V最小供电电压:1.14 V
标称供电电压:1.2 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:0.65 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:13 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLER, RISCBase Number Matches:1

AM1802BZCED3 数据手册

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Sample &  
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AM1802  
SPRS710E NOVEMBER 2010REVISED MARCH 2014  
®
AM1802 ARM Microprocessor  
1 AM1802 ARM Microprocessor  
1.1 Features  
1
• 300-MHz ARM926EJ-S™ RISC MPU  
• ARM926EJ-S Core  
• Two Serial Peripheral Interfaces (SPIs) Each with  
Multiple Chip Selects  
– 32-Bit and 16-Bit ( Thumb®) Instructions  
– Single-Cycle MAC  
• One Multimedia Card (MMC)/Secure Digital (SD)  
Card Interfaces with Secure Data I/O (SDIO)  
Interfaces  
• One Master and Slave Inter-Integrated Circuit ( I2C  
Bus™)  
• USB 2.0 OTG Port with Integrated PHY (USB0)  
– USB 2.0 High- and Full-Speed Client  
– USB 2.0 High-, Full-, and Low-Speed Host  
– End Point 0 (Control)  
– End Points 1, 2, 3, 4 (Control, Bulk, Interrupt or  
ISOC) RX and TX  
• One Multichannel Audio Serial Port (McASP):  
– Transmit and Receive Clocks  
– ARM Jazelle® Technology  
– Embedded ICE-RT™ for Real-Time Debug  
• ARM9™ Memory Architecture  
– 16KB of Instruction Cache  
– 16KB of Data Cache  
– 8KB of RAM (Vector Table)  
– 64KB of ROM  
• Enhanced Direct Memory Access Controller 3  
(EDMA3):  
– 2 Channel Controllers  
– 3 Transfer Controllers  
– Two Clock Zones and 16 Serial Data Pins  
– Supports TDM, I2S, and Similar Formats  
– DIT-Capable  
– 64 Independent DMA Channels  
– 16 Quick DMA Channels  
– Programmable Transfer Burst Size  
• 128KB of On-Chip Memory  
• 1.8-V or 3.3-V LVCMOS I/Os (Except for USB and  
DDR2 Interfaces)  
– FIFO Buffers for Transmit and Receive  
• 10/100 Mbps Ethernet MAC (EMAC):  
– IEEE 802.3 Compliant  
– MII Media-Independent Interface  
– RMII Reduced Media-Independent Interface  
– Management Data I/O (MDIO) Module  
• Two External Memory Interfaces:  
– EMIFA  
NOR (8- or 16-Bit-Wide Data)  
NAND (8- or 16-Bit-Wide Data)  
16-Bit SDRAM with 128-MB Address Space  
• Real-Time Clock (RTC) with 32-kHz Oscillator and  
Separate Power Rail  
• Three 64-Bit General-Purpose Timers (Each  
Configurable as Two 32-Bit Timers)  
• One 64-Bit General-Purpose or Watchdog Timer  
(Configurable as Two 32-Bit General-Purpose  
Timers)  
– DDR2/Mobile DDR Memory Controller with one  
of the following:  
16-Bit DDR2 SDRAM with 256-MB Address  
Space  
16-Bit mDDR SDRAM with 256-MB Address  
Space  
• Packages:  
– 361-Ball Pb-Free Plastic Ball Grid Array (PBGA)  
[ZCE Suffix], 0.65-mm Ball Pitch  
– 361-Ball PBGA [ZWT Suffix], 0.80-mm Ball Pitch  
• Industrial Temperature  
• Three Configurable 16550-Type UART Modules:  
– With Modem Control Signals  
– 16-Byte FIFO  
– 16x or 13x Oversampling Option  
1.2 Applications  
Medical, Healthcare, and Fitness  
Building Automation  
ePOS  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 

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