AK632512AW - 64 Pin Version
524,288 x 32 Bit CMOS / BiCMOS
Static Random Access Memory
ACCUTEK
MICROCIRCUIT CORPORATION
DESCRIPTION
Front View
The Accutek AK632512AW SRAM Module consists of fast high per-
formance SRAMs mounted on a low height, 64 pin SIM Board. The
module utilizes four 36 pin 512K x 8 SRAMs in 400 mil SOJ pack-
ages and four decoupling capacitors mounted two on the front side
and two on the back side of a printed circuit board.
33
64
1
32
The SRAMs used have common I/O functions and single output en-
able functions. Also, four separate chip select (CE) connections are
used to independently enable the four bytes. The modules can be
supplied in a variety of access time values from 15 nSEC to
35 nSEC in CMOS or BiCMOS technology.
Back View
The Accutek module is designed to have a maximum seated height
of 0.640 inch SIM to provide for the lowest height off the board. The
module conforms to JEDEC-standard size. The Presence Detect
feature has been disabled on this 64 pin module. The customer
must jumper his board to provide density identification. The avail-
able 72 pin module has the Presence Detect feature operational.
32
1
64
33
· Presence Detect, PD0 is open for identifying module density
· Downward compatible with 256K x 32 (AK632256), 128K x 32
(AK632128), 64K x 32 (AK63264) and 32K x 32 (AK63232), 64
pin SIM or ZIP designs
FEATURES
· 524,288 x 32 bit organization
replaces PD1 on Pin #3
· Upward compatible with 1 Meg x 32 (AK6321024)
· Similar to JEDEC standard 64 pin SIM format except that A18
· TTL-compatible inputs and outputs
· Single 5 volt power supply - AK632512AW
· Single 3.3 volt power supply - AK632512AW/3.3
· Operating free air temperature 00 to 700C
· Common I/O, single OE and WE functions with four separate
chip selects (CE)
· Fast access times from 15 nSEC
· Low height, 0.640 inch SIM maximum
ELECTRICAL SPECIFICATIONS
· Power:
Timing diagrams and basic electrical characteristics are those of the
standard 512K x 8 SRAMs used to construct these modules.
Accutek’s module design allows the flexibility of selecting indus-
try-compatible 512K x 8 SRAMs from several SRAM manufacturers.
720mA Max Active (20 nSEC)
760mA Max Active (15 nSEC)
800mA Max Active (12 nSEC)
200mA Max Standby
PIN NOMENCLATURE
PIN ASSIGNMENT
FUNCTIONAL DIAGRAM
A0 - A18
WE
+
+
A0 - A18
WE
PIN #
1
SYMBOL
Vss
PIN #
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
SYMBOL
A2
PIN #
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
SYMBOL
CE4
PIN #
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
SYMBOL
A4
19
A0 - A18
CE1 - CE4
DQ1 - DQ32
OE
Address Inputs
*
*
+
+
+
+
DQ1 - DQ8
DQ1 - DQ8
Chip Enable
Data In/Data Out
Output Enable
Presence Detect
5v Supply
2
PD0
A18
DQ1
DQ9
DQ2
DQ10
DQ3
DQ11
DQ4
DQ12
Vcc
A9
CE3
A11
OE
+
+
OE
3
DQ13
DQ5
DQ14
DQ6
DQ15
DQ7
DQ16
DQ8
Vss
A17
A5
CE
4
A16
A12
CE1
5
OE
Vcc
A0 - A18
WE
6
Vss
A13
PD0
*
*
DQ1 - DQ8
7
DQ25
DQ17
DQ26
DQ18
DQ27
DQ19
DQ28
DQ20
A3
A6
DQ9 - DQ16
DQ17 - DQ24
DQ25 - DQ32
Vcc
OE
8
D21
Vss
Ground
9
DQ29
DQ22
DQ30
DQ23
DQ31
DQ24
DQ32
Vss
CE
CE2
CE3
CE4
+
+
+
10
11
12
13
14
15
16
WE
Write Enable
A0 - A18
WE
*
*
WE
DQ1 - DQ8
MODULE OPTIONS
A0
A15
OE
A7
A14
CE
Leadless SIM: AK632512AW
A1
CE2
CE1
A8
A10
A0 - A168
WE
*
*
PD0 = Open
DQ1 - DQ8
OE
CE
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