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AK6321024ZK-17 PDF预览

AK6321024ZK-17

更新时间: 2022-12-01 21:03:21
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ACCUTEK 静态存储器
页数 文件大小 规格书
2页 137K
描述
SRAM

AK6321024ZK-17 数据手册

 浏览型号AK6321024ZK-17的Datasheet PDF文件第2页 
Accutek  
Microcircuit  
Corporation  
AK6321024W / AK6321024Z  
1,048,576 x 32 Bit CMOS/BiCMOS  
Static Random Access Memory  
DESCRIPTION  
Front View  
The Accutek AK631024 SRAM Module consists of fast high perfor-  
mance SRAMs mounted on a low profile, 72 pin SIM or ZIP PCB.  
The module utilizes four 32 pin 1 Meg x 4 SRAMs in 400 mil SOJ  
packages and four decoupling capacitor chips mounted on each  
side of a printed circuit board.  
72-Pin SIM  
+
+
1
36 37  
72  
The SRAMs used have common I/O functions and single output en-  
able functions. Also, four separate chip select (CE) connections are  
used to independently enable the four bytes. The modules can be  
supplied in a variety of access time values from 15nSEC to 30nSEC  
in CMOS or BiCMOS technology.  
72-Pin ZIP  
The Accutek module is designed to have a maximum seated height  
of 0.670 inch SIM or 0.550 inch ZIP to provide for the lowest height  
off the board. Each conforms to JEDEC-standard sizes and pin-out  
configurations. Using four pins for module memory density identifi-  
cation, PC0, PD1, PD2 and PD3 minimizes interchangeability and  
design considerations when changing from one module size to the  
other in customer applications.  
1
36  
72  
37  
· Power  
170mA Active (15nS)  
165mA Active (17nS)  
160mA Active (20nS)  
155mA Active (25nS)  
10mA Standby  
FEATURES  
· 1,048,576 x 32 SRAM module in high density configuration  
· JEDEC Standardized 72 pin SIM format  
· Downward pin compatible with 512K x 32 (AK632512) - 72 pin  
SIM or ZIP, and 256K x 32 (AK632256), 128K x 32 (AK632128),  
64K x 32 (AK63264) and 32K x 32 (AK63232) - 64 pin SIM or  
ZIP designs  
· Common I/O, single OE functions with four separate chip  
selects (CE)  
· Operating temperature range in free air, 00C to 700C  
· Low height, 0.670 inch SIM or 0.550 inch ZIP maximum  
· Presence Detect PD0 through PC3 for identifying module density  
· TTL compatible inputs and outputs  
ELECTRICAL SPECIFICATIONS  
Timing diagrams and basic electrical characteristics are those of the stan-  
dard 1 Meg x 4 SRAMs used to construct these modules. Accutek’s  
module design allows the flexibility of selecting industry-compatible 1  
Meg x 4 SRAMs from several semiconductor manufacturers.  
· Single 5 volt power supply  
· Fast access times range from 15 nSEC BiCMOS to 25 nSEC  
PIN NOMENCLATURE  
PIN ASSIGNMENT  
FUNCTIONAL DIAGRAM  
PIN #  
1
SYMBOL  
NC  
PIN #  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
SYMBOL  
A1  
PIN #  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
SYMBOL  
CE4  
CE3  
A17  
PIN #  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
69  
70  
71  
72  
SYMBOL  
A5  
A0 - A19  
CE1 - CE4  
DQ1 - DQ32  
OE  
Address Inputs  
Chip Enable  
Data In/Data Out  
Output Enable  
Presence Detect  
5v Supply  
2
NC  
A8  
A12  
3
PD2  
PD3  
Vss  
A2  
Vcc  
4
A9  
A16  
A13  
5
DQ13  
DQ5  
DQ14  
DQ6  
DQ15  
DQ7  
DQ16  
DQ8  
Vss  
OE  
A6  
PD0 - PD3  
Vcc  
6
PD0  
PD1  
DQ1  
DQ9  
DQ2  
DQ10  
DQ3  
DQ11  
DQ4  
DQ12  
Vcc  
Vss  
DQ21  
DQ29  
DQ22  
DQ30  
DQ23  
DQ31  
DQ24  
DQ32  
Vss  
7
DQ25  
DQ17  
DQ26  
DQ18  
DQ27  
DQ19  
DQ28  
DQ20  
A3  
8
Vss  
Ground  
9
WE  
Write Enable  
No Connect  
10  
11  
12  
13  
14  
15  
16  
17  
18  
NC  
MODULE OPTIONS  
WE  
A15  
A14  
CE2  
CE1  
A18  
Leadless SIM: AK6321024W  
Leades ZIP: AK6321024Z  
Leaded SIP: AK6321024G  
A10  
A19  
A0  
A4  
NC  
A7  
A11  
NC  
PD0 = Vss  
PD1 = Open  
PD2 = Vss  
PD3 = Open