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ADUM2211WSRWZ

更新时间: 2024-01-16 12:12:32
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亚德诺 - ADI /
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ADUM2211WSRWZ 数据手册

 浏览型号ADUM2211WSRWZ的Datasheet PDF文件第13页浏览型号ADUM2211WSRWZ的Datasheet PDF文件第14页浏览型号ADUM2211WSRWZ的Datasheet PDF文件第15页浏览型号ADUM2211WSRWZ的Datasheet PDF文件第17页浏览型号ADUM2211WSRWZ的Datasheet PDF文件第18页浏览型号ADUM2211WSRWZ的Datasheet PDF文件第19页 
ADuM2210/ADuM2211  
Data Sheet  
APPLICATIONS INFORMATION  
PCB LAYOUT  
DC CORRECTNESS AND MAGNETIC FIELD  
IMMUNITY  
The ADuM221x digital isolator requires no external interface  
circuitry for the logic interfaces. Power supply bypassing is  
strongly recommended at the input and output supply pins (see  
Figure 12). Bypass capacitors are most conveniently connected  
between Pin 1 and Pin 3 for VDD1 and between Pin 14 and  
Pin 16 for VDD2. The capacitor value should be between 0.01 μF  
and 0.1 μF. The total lead length between both ends of the  
capacitor and the input power supply pin should not exceed  
20 mm. Bypassing between Pin 3 and Pin 7 and between Pin 9  
and Pin 14 should be considered unless the ground pair on each  
package side is connected close to the package.  
Positive and negative logic transitions at the isolator input cause  
narrow (~1 ns) pulses to be sent via the transformer to the  
decoder. The decoder is bistable and is, therefore, either set or  
reset by the pulses, indicating input logic transitions. In the  
absence of logic transitions at the input for more than ~1 μs, a  
periodic set of refresh pulses indicative of the correct input state  
is sent to ensure dc correctness at the output. If the decoder  
receives no internal pulses for more than approximately 5 μs,  
the input side is assumed to be without power or nonfunctional;  
in which case, the isolator output is forced to a default state (see  
Table 11 and Table 12) by the watchdog timer circuit.  
GND  
GND  
1
2
NC  
NC  
V
The limitation on the ADuM221x magnetic field immunity is  
set by the condition in which induced voltage in the transformer  
receiving coil is large enough to either falsely set or reset the  
decoder. The following analysis defines the conditions under  
which this can occur. The 3 V operating condition of the  
ADuM221x is examined because it represents the most suscept-  
ible mode of operation.  
V
DD2  
DD1  
V
V
/V  
V
/V  
OA IA  
OB  
IA OA  
V
IB  
NC  
NC  
GND  
1
NC  
NC  
GND  
2
Figure 12. Recommended Printed Circuit Board Layout  
The pulses at the transformer output have an amplitude greater  
than 1.0 V. The decoder has a sensing threshold at about 0.5 V,  
therefore establishing a 0.5 V margin in which induced voltages  
can be tolerated. The voltage induced across the receiving coil is  
given by  
In applications involving high common-mode transients, care  
should be taken to ensure that board coupling across the  
isolation barrier is minimized. Furthermore, the board layout  
should be designed such that any coupling that does occur  
equally affects all pins on a given component side. Failure to  
ensure this could cause voltage differentials between pins  
exceeding the devices Absolute Maximum Ratings, thereby  
leading to latch-up or permanent damage.  
2
V = (−/dtπrn ; n = 1, 2,…, N  
where:  
β is the magnetic flux density (gauss).  
N is the number of turns in the receiving coil.  
rn is the radius of the nth turn in the receiving coil (cm).  
PROPAGATION DELAY-RELATED PARAMETERS  
Propagation delay is a parameter that describes the length of  
time it takes for a logic signal to propagate through a compo-  
nent. The propagation delay to a logic low output can differ  
from the propagation delay to logic high.  
Given the geometry of the receiving coil in the ADuM221x and  
an imposed requirement that the induced voltage be at most  
50% of the 0.5 V margin at the decoder, a maximum allowable  
magnetic field is calculated as shown in Figure 14.  
100  
INPUT (V  
)
50%  
Ix  
tPLH  
tPHL  
OUTPUT (V  
)
50%  
Ox  
10  
1
Figure 13. Propagation Delay Parameters  
Pulse width distortion is the maximum difference between  
these two propagation delay values and is an indication of how  
accurately the input signals timing is preserved.  
0.1  
Channel-to-channel matching refers to the maximum amount  
the propagation delay differs among channels within a single  
ADuM221x component.  
0.01  
0.001  
Propagation delay skew refers to the maximum amount the  
propagation delay differs among multiple ADuM221x  
components operated under the same conditions.  
1k  
10k  
100k  
1M  
10M  
100M  
MAGNETIC FIELD FREQUENCY (Hz)  
Figure 14. Maximum Allowable External Magnetic Flux Density  
Rev. A | Page 16 of 2  
 
 
 

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