Datasheet > ADuM152N1BRZ-RL7

ADuM152N1BRZ-RL7

更新时间： 2022-02-26 10:51:37

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
22页	536K
描述
High robustness to radiated and conducted noise

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ADuM152N1BRZ-RL7 数据手册

Data Sheet

ADuM150N/ADuM151N/ADuM152N

ELECTRICAL CHARACTERISTICS—2.5 V OPERATION

All typical specifications are at T_A= 25°C, V_DD1= V_DD2= 2.5 V. Minimum/maximum specifications apply over the entire recommended

operation range: 2.25 V ≤ V_DD1≤ 2.75 V, 2.25 V ≤ V_DD2≤ 2.75 V, −40°C ≤ T_A≤ +125°C, unless otherwise noted. Switching specifications

are tested with C_L= 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.

Table 5.

Parameter

Symbol Min

Typ

Max

Unit

Test Conditions/Comments

SWITCHING SPECIFICATIONS

Pulse Width

6.6

150

5.0

Mbps

ps/°C

Within PWD limit

50% input to 50% output

|t_PLH− t_PHL|

Data Rate¹

Propagation Delay

Pulse Width Distortion

Change vs. Temperature

Propagation Delay Skew

t_PHL, t_PLH

PWD

7.0

0.7

1.5

5.0

t_PSK

6.8

Between any two units at the

same temperature, voltage, load

Channel Matching

Codirectional

Opposing Direction

Jitter

t_PSKCD

t_PSKOD

0.7

800

190

5.0

ps p-p

ps rms

See the Jitter Measurement section

DC SPECIFICATIONS

Input Threshold Voltage

Logic High

Logic Low

Output Voltage

Logic High

V_IH

V_IL

0.7 × V_DDx

V_DDx− 0.1

0.3 × V_DDx

V_OH

V_OL

I_I

V_DDx

I_Ox²= −20 µA, V_Ix= V_IxH

V_DDx− 0.4 V_DDx− 0.2

I_Ox²= −2 mA, V_Ix= V_IxH

Logic Low

0.0

0.2

+0.01

0.1

0.4

+10

I_Ox²= 20 µA, V_Ix= V_IxL

I_Ox²= 2 mA, V_Ix= V_IxL

Input Current per Channel

Quiescent Supply Current

ADuM150N

−10

µA

0 V ≤ V_Ix≤ V_DDx

I_{DD1 (Q)}

I_{DD2 (Q)}

I_{DD1 (Q)}

I_{DD2 (Q)}

2.28

3.13

16.4

3.34

3.44

4.35

27.1

4.67

V_I⁵= 0 (N0), 1 (N1) ⁶

V_I⁵= 0 (N0), 1 (N1)⁶

V_I⁵= 1 (N0), 0 (N1)⁶

ADuM151N

ADuM152N

I_{DD1 (Q)}

I_{DD2 (Q)}

I_{DD1 (Q)}

I_{DD2 (Q)}

2.52

2.97

13.9

6.83

3.82

3.99

22.7

10.8

V_I⁵= 0 (N0), 1 (N1)⁶

V_I⁵= 1 (N0), 0 (N1)⁶

I_{DD1 (Q)}

I_{DD2 (Q)}

I_{DD1 (Q)}

I_{DD2 (Q)}

2.66

2.71

10.8

10.2

3.86

3.91

19.2

16.4

V_I⁵= 0 (N0), 1 (N1)⁶

V_I⁵= 1 (N0), 0 (N1)⁶

Dynamic Supply Current

Dynamic Input

Dynamic Output

Inputs switching, 50% duty cycle

I_{DDI (D)}

I_{DDO (D)}

0.01

mA/Mbps

Undervoltage Lockout

Positive V_DDxThreshold

Negative V_DDxThreshold

V_DDxHysteresis

V_DDxUV+

V_DDxUV−

V_DDxUVH

1.6

1.5

0.1

Rev. 0 | Page 7 of 22

1...4 5 678 9 10...22

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