ADuM141ES
Parameter
See notes at end of table
Conditions 1/9/
Unless otherwise specified
D,P,L
Limit
Min
0.7 VDDx
Limit
Max
Symbol
Sub-Group
Units
1
Logic Low Input Threshold
VIL
7/
1,2,3
1
1,2,3
0.3 VDDx
0.3 VDDx
V
V
D,P,L
Logic High Output
Voltages
VOH
IOx = −20 μA, VIx = VIxH 5/, 6/,7/
VDDx − 0.1
D,P,L
1
1,2,3
1
VDDx − 0.1
VDDx − 0.4
VDDx − 0.4
IOx = −4 mA, VIx = VIxH 5/, 6/,7/
D,P,L
Logic Low Output Voltages
VOL
IOx = 20 μA, VIx = VIxL 5/, 6/,7/
1,2,3
1
0.1
0.1
V
D,P,L
IOx = 4 mA, VIx = VIxL 5/, 6/,7/
1,2,3
1
0.4
0.4
D,P,L
Input Current per Channel
Enable Pull-Up Current
Enable Pull-Down Current
II
IPU
VIx = VDDx and VIx = 0V 5/, 6/,7/
1,2,3
1
1,2,3
1
1,2,3
1
1,2,3
1
1,2
3
1
1,2,3
1
1,2,3
1
-10
-10
-10
-10
+10
+10
µA
µA
µA
µA
V
D,P,L
VEx = 0 V 10/
D,P,L
VEx = VDDx 7/,10/
D,P,L
IPD
15
15
10
Tristate Output Current per
Channel
Undervoltage Lockout
IOZ
0 V ≤ VOx ≤ VDDx 7/
D,P,L
-10
-20
20
VDDxUV+
1.75
1.71
1.75
Positive VDDX Threshold
D,P,L
D,P,L
D,P,L
Undervoltage Lockout
Negative VDDX Threshold
Undervoltage Lockout
VDDX Hysteresis
VDDxUV-
VDDxUVH
1.35
1.35
V
V
0.4
0.4
TABLE IF NOTES:
1/ TA nom = 25ºC, TA max = 125ºC, and TA min = -55ºC unless otherwise noted. Switching specifications are tested with CL = 15 pF, and CMOS signal
levels, unless otherwise noted VDD1 nom = 1.8 V, VDD1 max = 1.9V, VDD1 min = 1.7V and VDD2 nom = 5 V, VDD2 max = 5.5 V, VDD2 min = 4.5V .
2/ Parameter is part of device initial characterization which is only repeated after design and process changes or with subsequent wafer lots.
3/ Parameter is not tested post irradiation
4/ tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages,
and output load within the recommended operating conditions.
5/ VIx refer to the voltage input signals of a given channel (A, B, C, or D).
6/ IOx refer to the output current of a given channel (A, B, C, or D).
7/ VDDx refers to the power supply on either side of a given channel (A, B, C, or D).
8/ 150 Mbps is the highest data rate that can be guaranteed, although higher data rates are possible
9/ Do not exceed Do not exceed VDD2nom where VDD2 = 5V at T = -55°C when all four channels are running in parallel. Device instability may occur.
10/ VEx refers to VE1 and VE2
ASD0016568C | Page 15 of 21