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ADUM1301BRWZ

更新时间： 2024-01-09 08:03:03

品牌	Logo	应用领域
亚德诺 - ADI		驱动程序和接口接口集成电路光电二极管 PC
页数	文件大小	规格书
20页	846K
描述
Triple-Channel Digital Isolators

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中文翻译

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技术参数
数据手册
替代型号

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ADUM1301BRWZ 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	SOP,	针数：	16
Reach Compliance Code：	unknown	风险等级：	5.57
Is Samacsys：	N	其他特性：	ALSO OPERATES AT 5V NOMINAL
模拟集成电路 - 其他类型：	ANALOG CIRCUIT	JESD-30 代码：	R-PDSO-G16
JESD-609代码：	e3	长度：	10.3 mm
湿度敏感等级：	1	功能数量：	3
端子数量：	16	最高工作温度：	125 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	峰值回流温度（摄氏度）：	260
座面最大高度：	2.65 mm	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	2.7 V	标称供电电压 (Vsup)：	3 V
表面贴装：	YES	技术：	CMOS
温度等级：	AUTOMOTIVE	端子面层：	MATTE TIN
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	40
宽度：	7.5 mm	Base Number Matches：	1

ADUM1301BRWZ 数据手册

ADuM1300/ADuM1301

Parameter

Symbol

Min

Typ

Max Unit

Test Conditions

For All Models

Output Disable Propagation Delay

(High/Low-to-High Impedance)

Output Enable Propagation Delay

(High Impedance to High/Low)

Output Rise/Fall Time (10% to 90%)

5 V/3 V Operation

3 V/5 V Operation

Common-Mode Transient Immunity at

Logic High Output⁸

Common-Mode Transient Immunity at

Logic Low Output⁸

Refresh Rate

t_PHZ, t_PLH

C_L= 15 pF, CMOS signal levels

t_PZH, t_PZL

t_R/t_f

3.0

2.5

kV/µs

|CM_H|

|CM_L|

f_r

V_Ix= V_DD1/V_DD2, V_CM= 1000 V,

transient magnitude = 800 V

V_Ix= 0 V, V_CM= 1000 V,

kV/µs

transient magnitude = 800 V

5 V/3 V Operation

3 V/5 V Operation

1.2

1.1

Mbps

Input Dynamic Supply Current, per Channel⁹I_{DDI (D)}

5 V/3 V Operation

0.19

0.10

mA/Mbps

3 V/5 V Operation

Output Dynamic Supply Current, per Channel⁹

I_{DDI (D)}

5 V/3 V Operation

3 V/5 V Operation

0.03

0.05

mA/Mbps

¹All voltages are relative to their respective ground.

²Supply current values for all three channels are combined when running at identical data rates. Output supply current values are specified with no output load present. The

supply current associated with an individual channel operating at a given data rate may be calculated as described in the Power Consumption section on Page 17. See Figure 6

through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 12 for total I_DD1and I_DD2

supply currents as a function of data rate for ADuM1300/ADuM1301 channel configurations.

³The minimum pulse width is the shortest pulse width at which the specified pulse-width distortion is guaranteed.

⁴The maximum data rate is the fastest data rate at which the specified pulse-width distortion is guaranteed.

⁵t_PHLpropagation delay is measured from the 50% level of the falling edge of the V_Ixsignal to the 50% level of the falling edge of the V_Oxsignal. t_PLHpropagation delay is measured

from the 50% level of the rising edge of the V_Ixsignal to the 50% level of the rising edge of the V_Oxsignal.

⁶t_PSKis the magnitude of the worst-case difference in t_PHLor t_PLHthat is measured between units at the same operating temperature, supply voltages, and output load within the

recommended operating conditions.

⁷Co-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation

barrier. Opposing-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing

sides of the isolation barrier.

⁸CM_His the maximum common-mode voltage slew rate that can be sustained while maintaining V_O> 0.8 V_DD2. CM_Lis the maximum common-mode voltage slew rate that can be

sustained while maintaining V_O< 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient magnitude is the

range over which the common mode is slewed.

⁹Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See Figure 6 through Figure 8 for information on per-

channel supply current for unloaded and loaded conditions. See the Power Consumption section on Page 17 for guidance on calculating the per-channel supply current for a

given data rate.

Rev. C | Page 9 of 20

1...6 7 8910 11 12...20

中文翻译

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ADUM1301BRWZ 替代型号

型号	品牌	替代类型	描述	数据表
ADUM1301BRWZ-RL	ADI	类似代替	Triple-Channel Digital Isolator
ADUM1301BRW-RL	ADI	完全替代	Triple-Channel Digital Isolator
ADuM1301WTRWZ	ADI	类似代替	Triple-Channel Digital Isolators

与ADUM1301BRWZ相关器件

型号	品牌	获取价格	描述	数据表
ADUM1301BRWZN	ADI	获取价格	Interface Circuit, CMOS, PDSO16
ADUM1301BRWZ-RL	ROCHESTER	获取价格	SPECIALTY ANALOG CIRCUIT, PDSO16, ROHS COMPLIANT, MS-013AA, SOIC-16
ADUM1301BRWZ-RL	ADI	获取价格	Triple-Channel Digital Isolator
ADUM1301CRW	ADI	获取价格	Triple-Channel Digital Isolators
ADUM1301CRW	ROCHESTER	获取价格	SPECIALTY ANALOG CIRCUIT, PDSO16, MS-013AA, SOIC-16
ADUM1301CRW-RL	ADI	获取价格	IC SPECIALTY ANALOG CIRCUIT, PDSO16, MS-013AA, SOIC-16, Analog IC:Other
ADUM1301CRWZ	ROCHESTER	获取价格	SPECIALTY ANALOG CIRCUIT, PDSO16, ROHS COMPLIANT, MS-013AA, SOIC-16
ADUM1301CRWZ	ADI	获取价格	Triple-Channel Digital Isolators
ADUM1301CRWZN	ADI	获取价格	Interface Circuit, CMOS, PDSO16
ADUM1301CRWZ-RL	ADI	获取价格	Triple-Channel Digital Isolator

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