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ADUM1301BRWZ

更新时间： 2024-01-17 04:32:13

品牌	Logo	应用领域
亚德诺 - ADI		驱动程序和接口接口集成电路光电二极管 PC
页数	文件大小	规格书
20页	846K
描述
Triple-Channel Digital Isolators

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ADUM1301BRWZ 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	SOP,	针数：	16
Reach Compliance Code：	unknown	风险等级：	5.57
Is Samacsys：	N	其他特性：	ALSO OPERATES AT 5V NOMINAL
模拟集成电路 - 其他类型：	ANALOG CIRCUIT	JESD-30 代码：	R-PDSO-G16
JESD-609代码：	e3	长度：	10.3 mm
湿度敏感等级：	1	功能数量：	3
端子数量：	16	最高工作温度：	125 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	峰值回流温度（摄氏度）：	260
座面最大高度：	2.65 mm	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	2.7 V	标称供电电压 (Vsup)：	3 V
表面贴装：	YES	技术：	CMOS
温度等级：	AUTOMOTIVE	端子面层：	MATTE TIN
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	40
宽度：	7.5 mm	Base Number Matches：	1

ADUM1301BRWZ 数据手册

ADuM1300/ADuM1301

APPLICATION INFORMATION

PC BOARD LAYOUT

DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY

The ADuM130x digital isolator requires no external interface

circuitry for the logic interfaces. Power supply bypassing is

strongly recommended at the input and output supply pins

(Figure 14). Bypass capacitors are most conveniently connected

between Pins 1 and 2 for V_DD1and between Pins 15 and 16 for

V_DD2. The capacitor value should be between 0.01 µF and 0.1 µF.

The total lead length between both ends of the capacitor and

the input power supply pin should not exceed 20 mm. Bypass-

ing between Pins 1 and 8 and between Pins 9 and 16 should also

be considered unless the ground pair on each package side is

connected close to the package.

Positive and negative logic transitions at the isolator input cause

narrow (~1 ns) pulses to be sent to the decoder via the trans-

former. The decoder is bistable and is therefore either set or

reset by the pulses, indicating input logic transitions. In the

absence of logic transitions of more than 2 µs at the input, a

periodic set of refresh pulses indicative of the correct input state

are sent to ensure dc correctness at the output. If the decoder

receives no internal pulses for more than about 5 µs, the input

side is assumed to be unpowered or nonfunctional, in which

case the isolator output is forced to a default state (see Table 10)

by the watchdog timer circuit.

GND

DD2

DD1

The ADuM130x is extremely immune to external magnetic

fields. The limitation on the ADuM130x’s magnetic field

immunity is set by the condition in which induced voltage in

the transformer’s receiving coil is sufficiently large to either

falsely set or reset the decoder. The following analysis defines

the conditions under which this may occur. The 3 V operating

condition of the ADuM130x is examined because it represents

the most susceptible mode of operation.

GND

IC/OC

OC/IC

GND

Figure 14. Recommended Printed Circuit Board Layout

In applications involving high common-mode transients, care

should be taken to ensure that board coupling across the isola-

tion barrier is minimized. Furthermore, the board layout should

be designed such that any coupling that does occur equally

affects all pins on a given component side. Failure to ensure this

could cause voltage differentials between pins exceeding the

device’s Absolute Maximum Ratings, thereby leading to latch-up

or permanent damage.

The pulses at the transformer output have an amplitude greater

than 1.0 V. The decoder has a sensing threshold at about 0.5 V,

therefore establishing a 0.5 V margin in which induced voltages

can be tolerated. The voltage induced across the receiving coil is

given by

V = (–dβ/dt)∑∏r_n; n = 1, 2,…, N

PROPAGATION DELAY-RELATED PARAMETERS

where:

Propagation delay is a parameter that describes the time it takes

a logic signal to propagate through a component. The propaga-

tion delay to a logic low output may differ from the propagation

delay to a logic high.

β is magnetic flux density (gauss).

N is the number of turns in the receiving coil.

r_nis the radius of the n^thturn in the receiving coil (cm).

Given the geometry of the receiving coil in the ADuM130x and

an imposed requirement that the induced voltage be at most

50% of the 0.5 V margin at the decoder, a maximum allowable

magnetic field is calculated as shown in Figure 16.

INPUT (V

)

50%

t_PLH

t_PHL

OUTPUT (V

)

50%

Figure 15. Propagation Delay Parameters

Pulse-width distortion is the maximum difference between

these two propagation delay values and is an indication of how

accurately the input signal’s timing is preserved.

Channel-to-channel matching refers to the maximum amount

that the propagation delay differs between channels within a

single ADuM130x component.

Propagation delay skew refers to the maximum amount that

the propagation delay differs between multiple ADuM130x

components operating under the same conditions.

Rev. C | Page 16 of 20

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ADUM1301BRWZ 替代型号

型号	品牌	替代类型	描述	数据表
ADUM1301BRWZ-RL	ADI	类似代替	Triple-Channel Digital Isolator
ADUM1301BRW-RL	ADI	完全替代	Triple-Channel Digital Isolator
ADuM1301WTRWZ	ADI	类似代替	Triple-Channel Digital Isolators

与ADUM1301BRWZ相关器件

型号	品牌	获取价格	描述	数据表
ADUM1301BRWZN	ADI	获取价格	Interface Circuit, CMOS, PDSO16
ADUM1301BRWZ-RL	ROCHESTER	获取价格	SPECIALTY ANALOG CIRCUIT, PDSO16, ROHS COMPLIANT, MS-013AA, SOIC-16
ADUM1301BRWZ-RL	ADI	获取价格	Triple-Channel Digital Isolator
ADUM1301CRW	ADI	获取价格	Triple-Channel Digital Isolators
ADUM1301CRW	ROCHESTER	获取价格	SPECIALTY ANALOG CIRCUIT, PDSO16, MS-013AA, SOIC-16
ADUM1301CRW-RL	ADI	获取价格	IC SPECIALTY ANALOG CIRCUIT, PDSO16, MS-013AA, SOIC-16, Analog IC:Other
ADUM1301CRWZ	ROCHESTER	获取价格	SPECIALTY ANALOG CIRCUIT, PDSO16, ROHS COMPLIANT, MS-013AA, SOIC-16
ADUM1301CRWZ	ADI	获取价格	Triple-Channel Digital Isolators
ADUM1301CRWZN	ADI	获取价格	Interface Circuit, CMOS, PDSO16
ADUM1301CRWZ-RL	ADI	获取价格	Triple-Channel Digital Isolator

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