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ADUM1300WTRWZ55-RL PDF预览

ADUM1300WTRWZ55-RL

更新时间: 2024-01-05 15:46:30
品牌 Logo 应用领域
亚德诺 - ADI 光电二极管接口集成电路
页数 文件大小 规格书
32页 541K
描述
Interface Circuit

ADUM1300WTRWZ55-RL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SOIC-16Reach Compliance Code:compliant
风险等级:5.82接口集成电路类型:INTERFACE CIRCUIT
JESD-30 代码:R-PDSO-G16长度:10.3 mm
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
座面最大高度:2.65 mm最大供电电压:5.5 V
最小供电电压:3 V标称供电电压:5 V
表面贴装:YES技术:CMOS
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.5 mm

ADUM1300WTRWZ55-RL 数据手册

 浏览型号ADUM1300WTRWZ55-RL的Datasheet PDF文件第23页浏览型号ADUM1300WTRWZ55-RL的Datasheet PDF文件第24页浏览型号ADUM1300WTRWZ55-RL的Datasheet PDF文件第25页浏览型号ADUM1300WTRWZ55-RL的Datasheet PDF文件第27页浏览型号ADUM1300WTRWZ55-RL的Datasheet PDF文件第28页浏览型号ADUM1300WTRWZ55-RL的Datasheet PDF文件第29页 
ADuM1300/ADuM1301  
Data Sheet  
For example, at a magnetic field frequency of 1 MHz, the  
maximum allowable magnetic field of 0.2 kgauss induces a  
voltage of 0.25 V at the receiving coil. This is about 50% of the  
sensing threshold and does not cause a faulty output transition.  
Similarly, if such an event occurs during a transmitted pulse  
(and has the worst-case polarity), it reduces the received pulse  
from >1.0 V to 0.75 V—still well above the 0.5 V sensing  
threshold of the decoder.  
POWER CONSUMPTION  
The supply current at a given channel of the ADuM1300/  
ADuM1301 isolator is a function of the supply voltage, the data  
rate of the channel, and the output load of the channel.  
For each input channel, the supply current is given by  
IDDI = IDDI (Q)  
f ≤ 0.5 fr  
f > 0.5 fr  
IDDI = IDDI (D) × (2f − fr) + IDDI (Q)  
The preceding magnetic flux density values correspond to  
specific current magnitudes at given distances from the  
ADuM1300/ADuM1301 transformers. Figure 17 shows these  
allowable current magnitudes as a function of frequency for  
selected distances. The ADuM1300/ADuM1301 is extremely  
immune and can be affected only by extremely large currents  
operated at a high frequency very close to the component. For  
the 1 MHz example noted, one would have to place a 0.5 kA  
current 5 mm away from the ADuM1300/ADuM1301 to affect  
the operation of the component.  
For each output channel, the supply current is given by  
I
I
DDO = IDDO (Q)  
f ≤ 0.5 fr  
DDO = (IDDO (D) + (0.5 × 10−3) × CL × VDDO) × (2f − fr) + IDDO (Q)  
f > 0.5 fr  
where:  
IDDI (D), IDDO (D) are the input and output dynamic supply currents  
per channel (mA/Mbps).  
CL is the output load capacitance (pF).  
V
DDO is the output supply voltage (V).  
1000  
f is the input logic signal frequency (MHz); it is half of the input  
data rate expressed in units of Mbps.  
fr is the input stage refresh rate (Mbps).  
DISTANCE = 1m  
100  
IDDI (Q), IDDO (Q) are the specified input and output quiescent  
supply currents (mA).  
10  
To calculate the total VDD1 and VDD2 supply current, the supply  
currents for each input and output channel corresponding to  
DISTANCE = 100mm  
1
VDD1 and VDD2 are calculated and totaled. Figure 6 and Figure 7  
DISTANCE = 5mm  
provide per-channel supply currents as a function of data rate  
for an unloaded output condition. Figure 8 provides per-channel  
supply current as a function of data rate for a 15 pF output  
condition. Figure 9 through Figure 12 provide total VDD1 and  
VDD2 supply current as a function of data rate for ADuM1300/  
ADuM1301 channel configurations.  
0.1  
0.01  
1k  
10k  
100k  
1M  
10M  
100M  
MAGNETIC FIELD FREQUENCY (Hz)  
Figure 17. Maximum Allowable Current  
for Various Current-to-ADuM1300/ADuM1301 Spacings  
Note that at combinations of strong magnetic field and high  
frequency, any loops formed by printed circuit board traces  
could induce error voltages sufficiently large enough to trigger  
the thresholds of succeeding circuitry. Take care in the layout of  
such traces to avoid this possibility.  
Rev. K | Page 26 of 32  
 
 
 

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