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ADUM1281

更新时间： 2024-02-14 18:43:17

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
16页	329K
描述
3 kV RMS Dual Channel Digital Isolators

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技术参数
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ADUM1281 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	SOP, SOP8,.25	针数：	8
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	2.11
Is Samacsys：	N	接口集成电路类型：	INTERFACE CIRCUIT
JESD-30 代码：	R-PDSO-G8	长度：	4.9 mm
功能数量：	1	端子数量：	8
最高工作温度：	125 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP8,.25	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	座面最大高度：	1.75 mm
最大供电电压：	5.5 V	最小供电电压：	3.135 V
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	AUTOMOTIVE
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	宽度：	3.9 mm
Base Number Matches：	1

ADUM1281 数据手册

Data Sheet

ADuM1280/ADuM1281/ADuM1285/ADuM1286

APPLICATIONS INFORMATION

DC CORRECTNESS AND MAGNETIC FIELD

IMMUNITY

PC BOARD LAYOUT

The ADuM128x digital isolator requires no external interface

circuitry for the logic interfaces. Power supply bypassing is

strongly recommended at both input and output supply pins

Positive and negative logic transitions at the isolator input

cause narrow (~1 ns) pulses to be sent via the transformer to

the decoder. The decoder is bistable and is, therefore, either set

or reset by the pulses indicating input logic transitions. In the

absence of logic transitions at the input for more than ~1.6 µs,

a periodic set of refresh pulses indicative of the correct input

state are sent to ensure dc correctness at the output.

_DD1and V_DD2(see Figure 12). The capacitor value should be

between 0.01 µF and 0.1 µF. The total lead length between both

ends of the capacitor and the input power supply pin should not

exceed 20 mm.

The ADuM128x can readily meet CISPR 22 Class A (and

FCC Class A) emissions standards, as well as the more

stringent CISPR 22 Class B (and FCC Class B) standards in

an unshielded environment, with proper PCB design choices.

Refer to the AN-1109 Applicaton Note, Recommendations for

Control of Radiated Emissions with iCoupler Devices for PCB-

related EMI mitigation techniques, including board layout and

stack-up issues.

If the decoder receives no pulses for more than about 6.4 µs, the

input side is assumed to be unpowered or nonfunctional, in which

case, the isolator output is forced to a default low state by the

watchdog timer circuit.

The limitation on the device’s magnetic field immunity is set

by the condition in which induced voltage in the transformer

receiving coil is sufficiently large to either falsely set or reset the

decoder. The following analysis defines such conditions. The

ADuM1280 is examined in a 3 V operating condition because it

represents the most susceptible mode of operation of this product.

PROPAGATION DELAY-RELATED PARAMETERS

Propagation delay is a parameter that describes the time it takes

a logic signal to propagate through a component. The input-to-

output propagation delay time for a high-to-low transition may

differ from the propagation delay time of a low-to-high

transition.

The pulses at the transformer output have an amplitude greater

than 1.5 V. The decoder has a sensing threshold of about 1.0 V,

therefore establishing a 0.5 V margin in which induced voltages

can be tolerated. The voltage induced across the receiving coil is

given by

INPUT (V

)

50%

V = (−dβ/dt)∑πr_n; n = 1, 2, …, N

t_PLH

t_PHL

where:

OUTPUT (V

)

50%

β is the magnetic flux density.

Figure 12. Propagation Delay Parameters

r_nis the radius of the n^thturn in the receiving coil.

N is the number of turns in the receiving coil.

Pulse width distortion is the maximum difference between

these two propagation delay values and an indication of how

accurately the timing of the input signal is preserved.

Given the geometry of the receiving coil in the ADuM1280 and

an imposed requirement that the induced voltage be, at most,

50% of the 0.5 V margin at the decoder, a maximum allowable

magnetic field is calculated, as shown in Figure 13.

100

Channel-to-channel matching refers to the maximum amount

the propagation delay differs between channels within a single

ADuM128x component.

Propagation delay skew refers to the maximum amount the

propagation delay differs between multiple ADuM128x

components operating under the same conditions.

0.1

0.01

0.001

10k

100k

10M

100M

MAGNETIC FIELD FREQUENCY (Hz)

Figure 13. Maximum Allowable External Magnetic Flux Density

Rev. 0 | Page 13 of 16

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中文翻译

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与ADUM1281相关器件

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ADUM1281ARZ	ADI	获取价格	3 kV RMS Dual Channel Digital Isolators
ADUM1281ARZ-RL7	ADI	获取价格	3 kV RMS Dual Channel Digital Isolators
ADUM1281BRZ	ADI	获取价格	3 kV RMS Dual Channel Digital Isolators
ADUM1281BRZ-RL7	ADI	获取价格	3 kV RMS Dual Channel Digital Isolators
ADUM1281CRZ	ADI	获取价格	3 kV RMS Dual Channel Digital Isolators
ADUM1281CRZ-RL7	ADI	获取价格	3 kV RMS Dual Channel Digital Isolators
ADUM1281WARZ	ADI	获取价格	3 kV RMS Dual Channel Digital Isolators
ADUM1281WARZ-RL7	ADI	获取价格	3kV rms, Default High, Dual-Channel Digital Isolators (1/1 Channel Directionality)
ADUM1281WBRZ	ADI	获取价格	3 kV RMS Dual Channel Digital Isolators
ADUM1281WCRZ	ADI	获取价格	3 kV RMS Dual Channel Digital Isolators

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