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ADUC836BCP

更新时间: 2024-02-01 13:56:15
品牌 Logo 应用领域
亚德诺 - ADI 转换器闪存微控制器
页数 文件大小 规格书
80页 5171K
描述
MicroConverter, Dual 16-Bit-ADCs with Embedded 62 kB Flash MCU

ADUC836BCP 数据手册

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ADuC836  
Parameter  
Min  
Typ  
Max  
Unit  
SPI MASTER MODETIMING (CPHA = 1)  
tSL  
tSH  
SCLOCK Low Pulsewidth*  
SCLOCK High Pulsewidth*  
Data OutputValid after SCLOCK Edge  
Data Input SetupTime before SCLOCK Edge  
Data Input HoldTime after SCLOCK Edge  
Data Output FallTime  
630  
630  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tDAV  
tDSU  
tDHD  
tDF  
tDR  
tSR  
50  
100  
100  
10  
10  
10  
10  
25  
25  
25  
25  
Data Output RiseTime  
SCLOCK RiseTime  
tSF  
SCLOCK FallTime  
*Characterized under the following conditions:  
Core clock divider bits CD2, CD1, and CD0 in PLLCON SFR set to 0, 1, and 1, respectively, i.e., core clock frequency = 1.57 MHz, and SPI bit rate selection bits  
SPR1 and SPR0 in SPICON SFR are both set to 0.  
SCLOCK  
(CPOL = 0)  
tSH  
tSL  
tSR  
tSF  
SCLOCK  
(CPOL = 1)  
tDAV  
tDOSU  
tDF  
tDR  
MOSI  
MISO  
MSB  
BITS 6–1  
LSB  
LSB IN  
MSB IN  
BITS 6–1  
tDSU tDHD  
Figure 75. SPI Master ModeTiming (CPHA = 1)  
REV. A  
–75–  

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