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ADUC7021BCPZ62IRL7 PDF预览

ADUC7021BCPZ62IRL7

更新时间： 2024-02-12 14:28:08
品牌 Logo 应用领域
亚德诺 - ADI 时钟微控制器外围集成电路
页数 文件大小 规格书
92页 964K
描述
IC 32-BIT, FLASH, 44 MHz, RISC MICROCONTROLLER, QCC40, 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD-2, LFCSP-40, Microcontroller

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ADUC7021BCPZ62IRL7 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：QFN
包装说明：HVQCCN, LCC40,.24SQ,20针数：40
Reach Compliance Code：compliantECCN代码：3A991.A.2
HTS代码：8542.31.00.01风险等级：5.22
具有ADC：YES地址总线宽度：
位大小：32CPU系列：ARM7
最大时钟频率：0.032768 MHzDAC 通道：YES
DMA 通道：NO外部数据总线宽度：
JESD-30 代码：S-XQCC-N40JESD-609代码：e3
长度：6 mm湿度敏感等级：3
I/O 线路数量：15端子数量：40
最高工作温度：125 °C最低工作温度：-40 °C
PWM 通道：YES封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装等效代码：LCC40,.24SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：260电源：3/3.3 V
认证状态：Not QualifiedRAM（字节）：8192
ROM（单词）：63488ROM可编程性：FLASH
座面最大高度：1 mm速度：44 MHz
子类别：Microcontrollers最大压摆率：45 mA
最大供电电压：3.6 V最小供电电压：2.7 V
标称供电电压：3 V表面贴装：YES
技术：CMOS温度等级：AUTOMOTIVE
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：40宽度：6 mm
uPs/uCs/外围集成电路类型：MICROCONTROLLER, RISCBase Number Matches：1

ADUC7021BCPZ62IRL7 数据手册

 浏览型号ADUC7021BCPZ62IRL7的Datasheet PDF文件第5页浏览型号ADUC7021BCPZ62IRL7的Datasheet PDF文件第6页浏览型号ADUC7021BCPZ62IRL7的Datasheet PDF文件第7页浏览型号ADUC7021BCPZ62IRL7的Datasheet PDF文件第9页浏览型号ADUC7021BCPZ62IRL7的Datasheet PDF文件第10页浏览型号ADUC7021BCPZ62IRL7的Datasheet PDF文件第11页 
ADuC7019/20/21/22/24/25/26/27  
Parameter  
Min  
Typ  
Max  
Unit  
kHz  
%
Test Conditions/Comments  
INTERNAL OSCILLATOR  
32.768  
3
MCU CLOCK RATE  
From 32 kHz Internal Oscillator  
From 32 kHz External Crystal  
Using an External Clock  
326  
41.78  
kHz  
CD = 7  
CD = 0  
TA = 85°C  
TA = 125°C  
Core clock = 41.78 MHz  
MHz  
MHz  
MHz  
0.05  
0.05  
44  
41.78  
START-UP TIME  
At Power-On  
From Pause/Nap Mode  
130  
24  
ms  
ns  
CD = 0  
CD = 7  
3.06  
1.58  
1.7  
ꢀs  
ms  
ms  
From Sleep Mode  
From Stop Mode  
PROGRAMMABLE LOGIC ARRAY (PLA)  
Pin Propagation Delay  
Element Propagation Delay  
12  
2.5  
ns  
ns  
From input pin to output pin  
13, 14  
POWER REQUIREMENTS  
Power Supply Voltage Range  
AVDD − AGND and IOVDD − IOGND  
Analog Power Supply Currents  
AVDD Current  
2.7  
3.6  
25  
V
200  
400  
3
ꢀA  
ꢀA  
ꢀA  
ADC in idle mode; all parts except ADuC7019  
ADC in idle mode; ADuC7019 only  
DACVDD Current15  
Digital Power Supply Current  
IOVDD Current in Normal Mode  
Code executing from Flash/EE  
CD = 7  
CD = 3  
CD = 0 (41.78 MHz clock)  
CD = 0 (41.78 MHz clock)  
TA = 85°C  
7
10  
15  
45  
30  
400  
1000  
mA  
mA  
mA  
mA  
ꢀA  
11  
40  
25  
250  
600  
IOVDD Current in Pause Mode  
IOVDD Current in Sleep Mode  
ꢀA  
TA = 125°C  
Additional Power Supply Currents  
ADC  
2
0.7  
700  
mA  
mA  
ꢀA  
@ 1 MSPS  
@ 62.5 kSPS  
per DAC  
DAC  
1 All ADC channel specifications are guaranteed during normal MicroConverter core operation.  
2 Apply to all ADC input channels.  
3 Measured using the factory set default values in ADCOF and ADCGN.  
4 Not production tested but supported by design and/or characterization data on production release.  
5 Measured using the factory set default values in ADCOF and ADCGN using an external AD845 op amp as an input buffer stage as shown in Figure 47. Based on  
external ADC system components, the user may need to execute a system calibration to remove external endpoint errors and achieve these specifications (see the  
Calibration section).  
6 The input signal can be centered on any dc common-mode voltage (VCM) as long as this value is within the ADC voltage input range specified.  
7 When using an external reference input pin, the internal reference must be disabled by setting the LSB in the REFCON memory mapped register to 0.  
8 DAC linearity is calculated using a reduced code range of 100 to 3995.  
9 DAC gain error is calculated using a reduced code range of 100 to internal 2.5 V VREF  
.
10 Endurance is qualified as per JEDEC Standard 22 method A117 and measured at −40°C, +25°C, +85°C, and +125°C.  
11 Retention lifetime equivalent at junction temperature (TJ) = 85°C as per JEDEC Standard 22 method A117. Retention lifetime derates with junction temperature.  
12 Test carried out with a maximum of eight I/O set to a low output level.  
13 Power supply current consumption is measured in normal, pause, and sleep modes under the following conditions: Normal Mode: 3.6 V supply, Pause Mode: 3.6 V  
supply, Sleep Mode: 3.6 V supply.  
14 IOVDD power supply current decreases typically by 2 mA during a flash/EE erase cycle.  
15 On the ADuC7019/20/21/22, this current must be added to AVDD current.  
Rev. A | Page 8 of 92  
 
1...567891011...92

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ADUC7021BCPZ62IRL7 替代型号

型号 品牌 替代类型 描述 数据表
ADuC7021BCPZ62-RL ADI

类似代替

 		Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU
ADuC7021BCPZ62I ADI

类似代替

 		Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU

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