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ADT7463ARQZ PDF预览

ADT7463ARQZ

更新时间： 2024-01-30 18:17:20
品牌 Logo 应用领域
亚德诺 - ADI 监视器光电二极管
页数 文件大小 规格书
52页 734K
描述
IC SPECIALTY ANALOG CIRCUIT, PDSO24, MO-137AE, QSOP-24, Analog IC:Other

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中文翻译

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ADT7463ARQZ 技术参数

是否无铅： 不含铅生命周期：Obsolete
零件包装代码：SSOP包装说明：SSOP, SSOP24,.24
针数：24Reach Compliance Code：unknown
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：5.22Samacsys Description：Remote Thermal Controller
其他特性：MONITORS UP TO 5 SUPPLY VOLTAGES; CONTROLS AND MONITORS UP TO 4 FAN SPEEDS模拟集成电路 - 其他类型：ANALOG CIRCUIT
JESD-30 代码：R-PDSO-G24JESD-609代码：e3
长度：8.65 mm湿度敏感等级：3
功能数量：1端子数量：24
最高工作温度：120 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：SSOP
封装等效代码：SSOP24,.24封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH峰值回流温度（摄氏度）：260
电源：3.3/5 V认证状态：Not Qualified
座面最大高度：1.7526 mm子类别：Motion Control Electronics
最大供电电流 (Isup)：3 mA最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：5 V
表面贴装：YES温度等级：INDUSTRIAL
端子面层：Tin (Sn)端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：3.9116 mm

ADT7463ARQZ 数据手册

 浏览型号ADT7463ARQZ的Datasheet PDF文件第43页浏览型号ADT7463ARQZ的Datasheet PDF文件第44页浏览型号ADT7463ARQZ的Datasheet PDF文件第45页浏览型号ADT7463ARQZ的Datasheet PDF文件第47页浏览型号ADT7463ARQZ的Datasheet PDF文件第48页浏览型号ADT7463ARQZ的Datasheet PDF文件第49页 
ADT7463  
Table XXVII. XOR Tree Test Enable  
Description  
XOR Tree Test Enable Register  
Register Address  
R/W*  
Power-On Default  
0x6F  
<0>  
Read/Write  
XEN  
0x00  
If the XEN bit is set to 1, the device enters the XOR Tree Test Mode. Clearing the bit  
removes the device from the XOR Test Mode.  
<7:1>  
Reserved  
Unused. Do not write to these bits.  
*This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register will have no effect.  
Table XXVIII. Remote 1 Temperature Offset  
Register Address  
0x70  
R/W*  
Description  
Power-On Default  
Read/Write  
Read/Write  
Remote 1 Temperature Offset  
0x00  
<7:0>  
Allows a twos complement offset value to be automatically added to or subtracted from  
the Remote 1 Temperature reading. This is to compensate for any inherent system offsets  
such as PCB trace resistance. LSB value = 0.25°C.  
*This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register will have no effect.  
Table XXIX. Local Temperature Offset  
Register Address  
0x71  
R/W*  
Description  
Power-On Default  
Read/Write  
Read/Write  
Local Temperature Offset  
0x00  
<7:0>  
Allows a twos complement offset value to be automatically added to or subtracted from  
the local temperature reading. LSB value = 0.25°C.  
*This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register will have no effect.  
Table XXX. Remote 2 Temperature Offset  
Register Address  
0x72  
R/W*  
Description  
Power-On Default  
Read/Write  
Read/Write  
Remote 2 Temperature Offset  
0x00  
<7:0>  
Allows a twos complement offset value to be automatically added to or subtracted from  
the Remote 2 Temperature reading. This is to compensate for any inherent system off-  
sets such as PCB trace resistance. LSB value = 0.25°C.  
*This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register will have no effect.  
–46–  
REV. C  
1...43444546474849...52

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