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ADT7422

更新时间: 2023-12-20 18:46:03
品牌 Logo 应用领域
亚德诺 - ADI 温度传感传感器温度传感器
页数 文件大小 规格书
23页 411K
描述
适用于 VSM 应用的精度为 ±0.1°C 的 16 位数字 I2C?温度传感器

ADT7422 数据手册

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ADT7422  
Data Sheet  
When reading from this register, the 8 MSBs (Bit 15 to Bit 8) are  
read first from Register Address 0x08 (TCRIT setpoint most  
significant byte register), and then the 8 LSBs (Bit 7 to Bit 0) are  
read from Register Address 0x09 (TCRIT setpoint least significant  
byte register). Only Register Address 0x08 (TCRIT setpoint most  
significant byte register) must be loaded into the address pointer  
register because the address pointer auto-increments to Register  
Address 0x09 (TCRIT setpoint least significant byte register).  
TCRIT SETPOINT REGISTERS  
The TCRIT setpoint most significant byte register and the TCRIT  
setpoint least significant byte register store the critical  
overtemperature limit value. A critical overtemperature event  
occurs when the temperature value stored in the temperature  
value register exceeds the value stored in this register. The CT pin  
is activated if a critical overtemperature event occurs. The  
temperature is stored in twos complement format with the  
MSB being the temperature sign bit.  
The default setting for the TCRIT setpoint register is 147°C.  
Table 6. THIGH Setpoint Most Significant Byte Register (Register Address 0x04)  
Bit  
Default Value  
Type Name  
Description  
[15:8] 0x20  
R/W  
T
HIGH most significant byte  
MSBs of the overtemperature limit, stored in twos complement format.  
Table 7. THIGH Setpoint Least Significant Byte Register (Register Address 0x05)  
Bit  
Default Value  
Type Name  
Description  
[7:0] 0x00  
R/W  
T
HIGH least significant byte  
LSBs of the overtemperature limit, stored in twos complement format.  
Table 8. TLOW Setpoint Most Significant Byte Register (Register Address 0x06)  
Bit  
Default Value Type Name  
Description  
[15:8] 0x05  
R/W  
T
LOW most significant byte  
MSBs of the undertemperature limit, stored in twos complement format.  
Table 9. TLOW Setpoint Least Significant Byte Register (Register Address 0x07)  
Bit  
Default Value  
Type Name  
Description  
[7:0] 0x00  
R/W  
T
LOW least significant byte  
LSBs of the undertemperature limit, stored in twos complement format.  
Table 10. TCRIT Setpoint Most Significant Byte Register (Register Address 0x08)  
Bit Default Value Type Name Description  
R/W  
[15:8] 0x49 CRIT most significant byte MSBs of the critical overtemperature limit, stored in twos complement format.  
T
Table 11. TCRIT Setpoint Least Significant Byte Register (Register Address 0x09)  
Bit  
Default Value  
Type Name  
Description  
[7:0] 0x80  
R/W  
T
CRIT least significant byte  
LSBs of the critical overtemperature limit, stored in twos complement format.  
Rev. A | Page 10 of 23  
 

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