Datasheet > 微控制器和处理器 > 数字信号处理器> ADSP-2181KST-115

ADSP-2181KST-115

更新时间： 2024-01-12 10:45:05

品牌	Logo	应用领域
亚德诺 - ADI		微控制器和处理器外围集成电路数字信号处理器装置电脑时钟
页数	文件大小	规格书
32页	293K
描述
DSP Microcomputer

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数据手册

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ADSP-2181KST-115 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	QFP	包装说明：	TQFP-128
针数：	128	Reach Compliance Code：	not_compliant
ECCN代码：	3A991.A.2	HTS代码：	8542.31.00.01
风险等级：	5.83	其他特性：	33 MIPS SUSTAINED; SINGLE CYCLE INSTRUCTION EXECUTION
地址总线宽度：	14	桶式移位器：	YES
位大小：	16	边界扫描：	NO
最大时钟频率：	14.4 MHz	外部数据总线宽度：	24
格式：	FIXED POINT	集成缓存：	NO
内部总线架构：	MULTIPLE	JESD-30 代码：	R-PQFP-G128
JESD-609代码：	e0	长度：	20 mm
低功率模式：	YES	湿度敏感等级：	3
DMA 通道数量：	2	外部中断装置数量：	4
串行 I/O 数：	2	端子数量：	128
计时器数量：	1	片上数据RAM宽度：	16
片上程序ROM宽度：		最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	LFQFP	封装等效代码：	QFP128,.63X.87,20
封装形状：	RECTANGULAR	封装形式：	FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：	240	电源：	5 V
认证状态：	Not Qualified	RAM（字数）：	8192
座面最大高度：	1.6 mm	子类别：	Digital Signal Processors
最大压摆率：	100 mA	最大供电电压：	5.5 V
最小供电电压：	4.5 V	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	30
宽度：	14 mm	uPs/uCs/外围集成电路类型：	DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches：	1

ADSP-2181KST-115 数据手册

ADSP-2181

Table II.

P MO VLAY Mem ory A13

Mem or y Ar chitectur e

T he ADSP-2181 provides a variety of memory and peripheral

interface options. T he key functional groups are Program

Memory, Data Memory, Byte Memory and I/O.

A12:0

Internal

Not Applicable Not Applicable

P r ogr am Mem or y is a 24-bit-wide space for storing both

instruction opcodes and data. T he ADSP-2181 has 16K words

of Program Memory RAM on chip and the capability of access-

ing up to two 8K external memory overlay spaces using the

external data bus. Both an instruction opcode and a data value

can be read from on-chip program memory in a single cycle.

External

Overlay 1

13 LSBs of Address

Between 0x2000

and 0x3FFF

External

13 LSBs of Address

Between 0x2000

and 0x3FFF

Overlay 2

D ata Mem or y is a 16-bit-wide space used for the storage of

data variables and for memory-mapped control registers. T he

ADSP-2181 has 16K words on Data Memory RAM on chip,

consisting of 16,352 user-accessible locations and 32 memory-

mapped registers. Support also exists for up to two 8K external

memory overlay spaces through the external data bus.

T his organization provides for two external 8K overlay segments

using only the normal 14 address bits. T his allows for simple

program overlays using one of the two external segments in

place of the on-chip memory. Care must be taken in using this

overlay space in that the processor core (i.e., the sequencer)

does not take into account the PMOVLAY register value. For

example, if a loop operation was occurring on one of the exter-

nal overlays and the program changes to another external over-

lay or internal memory, an incorrect loop operation could occur.

In addition, care must be taken in interrupt service routines as

the overlay registers are not automatically saved and restored on

the processor mode stack.

Byte Mem or y provides access to an 8-bit wide memory space

through the Byte DMA (BDMA) port. T he Byte Memory inter-

face provides access to 4 MBytes of memory by utilizing eight

data lines as additional address lines. T his gives the BDMA Port

an effective 22-bit address range. On power-up, the DSP can

automatically load bootstrap code from byte memory.

I/O Space allows access to 2048 locations of 16-bit-wide data.

It is intended to be used to communicate with parallel periph-

eral devices such as data converters and external registers or

latches.

For ADSP-2100 Family compatibility, MMAP = 1 is allowed.

In this mode, booting is disabled and overlay memory is dis-

abled (PMOVLAY must be 0). Figure 5 shows the memory map

in this configuration.

P r ogr am Mem or y

T he ADSP-2181 contains a 16K × 24 on-chip program RAM.

T he on-chip program memory is designed to allow up to two

accesses each cycle so that all operations can complete in a

single cycle. In addition, the ADSP-2181 allows the use of 8K

external memory overlays.

PROGRAM MEMORY

ADDRESS

0x3FFF

INTERNAL 8K

(PMOVLAY = 0,

MMAP = 1)

0x2000

0x1FFF

T he program memory space organization is controlled by the

MMAP pin and the PMOVLAY register. Normally, the ADSP-

2181 is configured with MMAP = 0 and program memory orga-

nized as shown in Figure 4.

8K EXTERNAL

0x0000

PROGRAM MEMORY

ADDRESS

0x3FFF

Figure 5. Program Mem ory (MMAP = 1)

D ata Mem or y

T he ADSP-2181 has 16,352 16-bit words of internal data

memory. In addition, the ADSP-2181 allows the use of 8K

external memory overlays. Figure 6 shows the organization of

the data memory.

8K INTERNAL

(PMOVLAY = 0,

MMAP = 0)

EXTERNAL 8K

(PMOVLAY = 1 or 2,

MMAP = 0)

0x2000

0x1FFF

DATA MEMORY

ADDRESS

0x3FFF

8K INTERNAL

32 MEMORY–

MAPPED REGISTERS

0x0000

0x3FEO

0x3FDF

Figure 4. Program Mem ory (MMAP = 0)

INTERNAL

8160 WORDS

T here are 16K words of memory accessible internally when the

PMOVLAY register is set to 0. When PMOVLAY is set to

something other than 0, external accesses occur at addresses

0x2000 through 0x3FFF. T he external address is generated as

shown in T able II.

0x2000

0x1FFF

8K INTERNAL

(DMOVLAY = 0)

EXTERNAL 8K

(DMOVLAY = 1, 2)

0x0000

Figure 6. Data Mem ory

REV. D

–7–

1...4 5 678 9 10...32

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与ADSP-2181KST-115相关器件

型号	品牌	描述	获取价格	数据表
ADSP-2181KST-133	ADI	DSP Microcomputer	获取价格
ADSP-2181KST-160	ADI	DSP Microcomputer	获取价格
ADSP-2181KSTZ-115	ADI	IC 24-BIT, 14.4 MHz, OTHER DSP, PQFP128, METRIC, PLASTIC, TQFP-128, Digital Signal Process	获取价格
ADSP-2181KSZ-133	ADI	DSP Microcomputer	获取价格
ADSP-2181KSZ-160	ADI	DSP Microcomputer	获取价格
ADSP2183	ADI	DSP Microcomputer	获取价格

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