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ADP8863ACPZ-R7

更新时间： 2024-01-20 11:28:43
品牌 Logo 应用领域
亚德诺 - ADI 驱动器泵
页数 文件大小 规格书
48页 760K
描述
Charge Pump,7-Channel Fun Lighting LED Driver

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ADP8863ACPZ-R7 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFN
包装说明：LFCSP-20针数：20
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：2.28
Samacsys Description：1.5 A LED Flash Driver with I2C-Compatible Interface数据输入模式：SERIAL
接口集成电路类型：LED DISPLAY DRIVERJESD-30 代码：S-XQCC-N20
JESD-609代码：e3长度：4 mm
湿度敏感等级：1复用显示功能：NO
功能数量：1区段数：7
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装等效代码：LCC20,.16SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：260电源：3.6 V
认证状态：Not Qualified座面最大高度：0.8 mm
子类别：Display Drivers最大供电电压：5.5 V
最小供电电压：2.5 V标称供电电压：3.6 V
表面贴装：YES温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：4 mm
最小 fmax：0.4 MHzBase Number Matches：1

ADP8863ACPZ-R7 数据手册

 浏览型号ADP8863ACPZ-R7的Datasheet PDF文件第41页浏览型号ADP8863ACPZ-R7的Datasheet PDF文件第42页浏览型号ADP8863ACPZ-R7的Datasheet PDF文件第43页浏览型号ADP8863ACPZ-R7的Datasheet PDF文件第45页浏览型号ADP8863ACPZ-R7的Datasheet PDF文件第46页浏览型号ADP8863ACPZ-R7的Datasheet PDF文件第47页 
ADP8863  
COMPARATOR REGISTER DESCRIPTIONS  
Comparator Configuration (CCFG)—Register 0x1B  
Table 65. CCFG Bit Map  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
FILT  
FORCE_RD  
L3_OUT  
L2_OUT  
L3_EN  
L2_EN  
Table 66. Bit Descriptions for the CCFG Register  
Bit Name  
Bit No.  
Description  
FILT  
[7:5]  
Filter setting for the CMP_IN light sensor.  
000 = 80 ms  
001 = 160 ms  
010 = 320 ms  
011 = 640 ms  
100 = 1280 ms  
101 = 2560 ms  
110 = 5120 ms  
111 = 10,240 ms  
FORCE_RD  
4
Force a read of the CMP_IN light sensor while independent sinks are running, but the backlight is not. Reset by  
chip after the conversion is complete and L2_OUT and L3_OUT are valid. Ignored if the backlight is enabled.  
L3_OUT  
L2_OUT  
L3_EN  
3
2
1
This bit is the output of the L3 comparator.  
This bit is the output of the L2 comparator.  
1 = the L3 comparator is enabled for the CMP_IN comparator.  
0 = the L3 comparator is disabled for the CMP_IN comparator.  
Note that the L3 comparator has priority over the L2 comparator.  
1 = the L2 comparator is enabled for the CMP_IN comparator.  
0 = the L2 comparator is disabled for the CMP_IN comparator.  
L2_EN  
0
Second Comparator Configuration (CCFG2)—Register 0x1C  
Table 67. CCFG2 Bit Map  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
FILT2  
FORCE_RD2  
L3_OUT2  
L2_OUT2  
L3_EN2  
L2_EN2  
Table 68. Bit Descriptions for the CCFG2 Register  
Bit Name  
Bit No.  
Description  
FILT2  
[7:5]  
Filter setting for the CMP_IN2 light sensor.  
000 = 80 ms  
001 = 160 ms  
010 = 320 ms  
011 = 640 ms  
100 = 1280 ms  
101 = 2560 ms  
110 = 5120 ms  
111= 10,240 ms  
FORCE_RD2  
4
Force a read of the CMP_IN2 light sensor while independent sinks are running, but the backlight is not. Reset by  
chip after the conversion is complete and L2_OUT and L3_OUT are valid. Ignored if backlight is enabled.  
L3_OUT2  
L2_OUT2  
L3_EN2  
3
2
1
This bit is the output of the L3 comparator for the second light sensor.  
This bit is the output of the L2 comparator for the second light sensor.  
1 = the L3 comparator is enabled for the CMP_IN2 comparator.  
0 = the L3 comparator is disabled for the CMP_IN2 comparator.  
Note that the L3 comparator has priority over the L2 comparator.  
1 = the L2 comparator is enabled for the CMP_IN2 comparator.  
0 = the L2 comparator is disabled for the CMP_IN2 comparator.  
L2_EN2  
0
Rev. 0 | Page 44 of 48  
 
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