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ADP3339AKC-1.8-RL7

更新时间： 2024-02-28 07:29:53
品牌 Logo 应用领域
亚德诺 - ADI 线性稳压器IC调节器电源电路光电二极管输出元件
页数 文件大小 规格书
12页 345K
描述
High Accuracy, Ultralow IQ, 1.5 A, anyCAP Low Dropout Regulator

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ADP3339AKC-1.8-RL7 技术参数

是否无铅：含铅是否Rohs认证：不符合
生命周期：Active零件包装代码：TO-261AA
包装说明：SOP,针数：4
Reach Compliance Code：unknown风险等级：5.17
Is Samacsys：N最大回动电压 1：0.48 V
最大输入电压：6 V最小输入电压：2.3 V
JESD-30 代码：R-PDSO-G3JESD-609代码：e0
长度：6.5 mm湿度敏感等级：1
功能数量：1端子数量：3
工作温度TJ-Max：125 °C工作温度TJ-Min：-40 °C
最大输出电流 1：1.5 A最大输出电压 1：1.827 V
最小输出电压 1：1.773 V标称输出电压 1：1.8 V
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：240调节器类型：FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR
座面最大高度：1.8 mm表面贴装：YES
端子面层：TIN LEAD端子形式：GULL WING
端子节距：2.3 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30宽度：3.5 mm
Base Number Matches：1

ADP3339AKC-1.8-RL7 数据手册

 浏览型号ADP3339AKC-1.8-RL7的Datasheet PDF文件第6页浏览型号ADP3339AKC-1.8-RL7的Datasheet PDF文件第7页浏览型号ADP3339AKC-1.8-RL7的Datasheet PDF文件第8页浏览型号ADP3339AKC-1.8-RL7的Datasheet PDF文件第10页浏览型号ADP3339AKC-1.8-RL7的Datasheet PDF文件第11页浏览型号ADP3339AKC-1.8-RL7的Datasheet PDF文件第12页 
ADP3339  
THEORY OF OPERATION  
The ADP3339 anyCAP LDO uses a single control loop for  
regulation and reference functions. The output voltage is sensed  
by a resistive voltage divider, consisting of R1 and R2, which is  
varied to provide the available output voltage option. Feedback  
is taken from this network by way of a series diode (D1) and a  
second resistor divider (R3 and R4) to the input of an amplifier.  
Most LDOs place very strict requirements on the range of ESR  
values for the output capacitor because they are difficult to  
stabilize due to the uncertainty of load capacitance and resis-  
tance. Moreover, the ESR value required to keep conventional  
LDOs stable changes depending on load and temperature.  
These ESR limitations make designing with LDOs more  
difficult because of their unclear specifications and extreme  
variations over temperature.  
A very high gain error amplifier is used to control this loop. The  
amplifier is constructed in such a way that equilibrium  
produces a large, temperature-proportional input offset voltage  
that is repeatable and very well controlled. The temperature-  
proportional offset voltage is combined with the complemen-  
tary diode voltage to form a virtual band gap voltage that is  
implicit in the network, although it never appears explicitly in  
the circuit. Ultimately, this patented design makes it possible to  
control the loop with only one amplifier. This technique also  
improves the noise characteristics of the amplifier by providing  
more flexibility on the trade-off of noise sources that leads to a  
low noise design.  
With the ADP3339 anyCAP LDO, this is no longer true. It can  
be used with virtually any good quality capacitor, with no  
constraint on the minimum ESR. This innovative design allows  
the circuit to be stable with just a small 1 µF capacitor on the  
output. Additional advantages of the pole-splitting scheme  
include superior line noise rejection and very high regulator  
gain, which lead to excellent line and load regulation. An  
impressive 1.5 accuracy is guaranteed over line, load, and  
temperature.  
Additional features of the circuit include current limit and  
thermal shutdown.  
The R1, R2 divider is chosen in the same ratio as the band gap  
voltage to the output voltage. Although the R1, R2 resistor  
divider is loaded by diode D1 and a second divider consisting of  
R3 and R4, the values can be chosen to produce a temperature-  
stable output. This unique arrangement specifically corrects for  
the loading of the divider, thus avoiding the error resulting from  
base current loading in conventional circuits.  
V
V
OUT  
IN  
C1  
C2  
1µF  
1µF  
IN  
OUT  
GND  
ADP3339  
The patented amplifier controls a new and unique noninverting  
driver that drives the pass transistor, Q1. The use of this special  
noninverting driver enables the frequency compensation to  
include the load capacitor in a pole-splitting arrangement to  
achieve reduced sensitivity to the value, type, and ESR of the  
load capacitance.  
Figure 20. Typical Application Circuit  
INPUT  
OUTPUT  
COMPENSATION  
CAPACITOR  
Q1  
ATTENUATION  
R1  
(a)  
(V  
/V  
)
BANDGAP OUT  
R3 D1  
C
R
PTAT  
LOAD  
NONINVERTING  
WIDEBAND  
DRIVER  
V
OS  
g
m
PTAT  
LOAD  
CURRENT  
R4  
R2  
ADP3339  
GND  
Figure 21. Functional Block Diagram  
Rev. A | Page 9 of 12  
 
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