ADP3338
THEORY OF OPERATION
The ADP3338 anyCAP LDO uses a single control loop for
regulation and reference functions. The output voltage is sensed
by a resistive voltage divider, consisting of R1 and R2, which is
varied to provide the available output voltage option. Feedback
is taken from this network by way of a series diode (D1) and a
second resistor divider (R3 and Rꢁ) to the input of an amplifier.
include the load capacitor in a pole-splitting arrangement to
achieve reduced sensitivity to the value, type, and ESR of the
load capacitance.
Most LDOs place very strict requirements on the range of ESR
values for the output capacitor because they are difficult to
stabilize due to the uncertainty of load capacitance and resis-
tance. Moreover, the ESR value required to keep conventional
LDOs stable changes depending on load and temperature.
These ESR limitations make designing with LDOs more
difficult because of their unclear specifications and extreme
variations over temperature.
A very high gain error amplifier is used to control this loop. The
amplifier is constructed in such a way that equilibrium produces
a large, temperature-proportional input offset voltage that is
repeatable and very well controlled. The temperature-propor-
tional offset voltage is combined with the complementary diode
voltage to form a virtual band gap voltage that is implicit in the
network, although it never appears explicitly in the circuit.
Ultimately, this patented design makes it possible to control the
loop with only one amplifier. This technique also improves the
noise characteristics of the amplifier by providing more flexi-
bility on the trade off of noise sources that leads to a low noise
design.
With the ADP3338 anyCAP LDO, this is no longer true. It can
be used with virtually any good quality capacitor, with no
constraint on the minimum ESR. This innovative design
provides circuit stability with just a small 1 µF capacitor on the
output. Additional advantages of the pole-splitting scheme
include superior line noise rejection and very high regulator
gain to achieve excellent line and load regulation. An impressive
±1.ꢁꢀ accuracy is guaranteed over line, load, and temperature.
The R1, R2 divider is chosen in the same ratio as the band gap
voltage to the output voltage. Although the R1, R2 resistor
divider is loaded by Diode D1 and a second divider consisting
of R3 and Rꢁ, the values can be chosen to produce a tempera-
ture-stable output. This unique arrangement specifically corrects
for the loading of the divider, thus avoiding the error resulting
from base current loading in conventional circuits.
Additional features of the circuit include current limit and
thermal shutdown.
V
V
OUT
IN
C1
C2
1µF
1µF
IN
OUT
GND
ADP3338
The patented amplifier controls a new and unique noninverting
driver that drives the pass transistor, Q1. The use of this special
noninverting driver enables the frequency compensation to
Figure 20. Typical Application Circuit
INPUT
OUTPUT
COMPENSATION
CAPACITOR
Q1
ATTENUATION
R1
(a)
(V
/V
)
BANDGAP OUT
R3 D1
C
R
PTAT
LOAD
NONINVERTING
WIDEBAND
DRIVER
V
OS
g
m
PTAT
LOAD
CURRENT
R4
R2
ADP3338
GND
Figure 21. Functional Block Diagram
Rev. B | Page 9 of 16
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