ADP3338AKC-1.8-RL

更新时间： 2024-02-28 02:37:00

品牌	Logo	应用领域
亚德诺 - ADI		线性稳压器IC 调节器电源电路光电二极管输出元件
页数	文件大小	规格书
16页	295K
描述
High Accuracy, Ultralow I Low Dropout Regulator

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技术参数
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ADP3338AKC-1.8-RL 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Active	零件包装代码：	TO-261AA
包装说明：	SOP,	针数：	4
Reach Compliance Code：	unknown	风险等级：	5.17
Is Samacsys：	N	最大回动电压 1：	0.4 V
最大输入电压：	8 V	最小输入电压：	2.7 V
JESD-30 代码：	R-PDSO-G4	JESD-609代码：	e0
长度：	6.5 mm	湿度敏感等级：	1
功能数量：	1	端子数量：	4
工作温度TJ-Max：	125 °C	工作温度TJ-Min：	-40 °C
最大输出电流 1：	1 A	最大输出电压 1：	1.8252 V
最小输出电压 1：	1.7748 V	标称输出电压 1：	1.8 V
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	240	调节器类型：	FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR
座面最大高度：	1.8 mm	表面贴装：	YES
端子面层：	TIN LEAD	端子形式：	GULL WING
端子节距：	2.3 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	30	宽度：	3.5 mm
Base Number Matches：	1

ADP3338AKC-1.8-RL 数据手册

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ADP3338

APPLICATION INFORMATION

CAPACITOR SELECTION

CALCULATING POWER DISSIPATION

Output Capacitor

Device power dissipation is calculated as

The stability and transient response of the LDO is a function of

the output capacitor. The ADP3338 is stable with a wide range

of capacitor values, types, and ESR (anyCAP). A capacitor as

low as 1 µF is the only requirement for stability. A higher ca-

pacitance may be necessary if high output current surges are

anticipated, or if the output capacitor cannot be located near the

output and ground pins. The ADP3338 is stable with extremely

low ESR capacitors (ESR ≈ ±) such as multilayer ceramic capacitors

(MLCC) or OSCON. Note that the effective capacitance of some

capacitor types falls below the minimum over temperature or

with dc voltage.

P_D= (V_IN– V_OUT) × I_LOAD+ (V_IN× I_GND

)

Where I_LOADand I_GNDare load current and ground current, and

_INand V_OUTare the input and output voltages, respectively.

Assuming the worst-case operating conditions are I_LOAD= 1.± A,

I_GND= 1± mA, V_IN= 3.3 V, and V_OUT= 2.5 V, the device power

dissipation is

P_D= (3.3 V – 2.5 V) × 1±±± mA + (3.3 V × 1± mA) = 833 mW

So, for a junction temperature of 125°C and a maximum

ambient temperature of 85°C, the required thermal resistance

from junction to ambient is

Input Capacitor

An input bypass capacitor is not strictly required, but is recom-

mended in any application involving long input wires or high

source impedance. Connecting a 1 µF capacitor from the input

to ground reduces the sensitivity of the circuit to PC board

layout and input transients. If a larger output capacitor is

necessary, a larger value input capacitor is recommended.

125°C − 85°C

θ_JA

= ꢁ8°C/W

±.833 W

PRINTED CIRCUIT BOARD LAYOUT

CONSIDERATIONS

The thermal resistance, θ_JA, of the SOT-223 is determined by the

sum of the junction-to-case and the case-to-ambient thermal

resistances. The junction-to-case thermal resistance, θ_JC, is

determined by the package design and is specified at 26.8°C/W.

However, the case-to-ambient thermal resistance is determined

by the printed circuit board design.

OUTPUT CURRENT LIMIT

The ADP3338 is short-circuit protected by limiting the pass

transistor’s base drive current. The maximum output current is

limited to approximately 2 A (see Figure 16).

THERMAL OVERLOAD PROTECTION

As shown in Figure 22, the amount of copper to which the

ADP3338 is mounted affects thermal performance. When

mounted to the minimal pads of 2 oz. copper, as shown in

Figure 22 (a), θ_JAis 126.6°C/W. Adding a small copper pad

under the ADP3338, as shown in Figure 22 (b), reduces the θ_JAto

1±2.9°C/W. Increasing the copper pad to one square inch, as

shown in Figure 22 (c), reduces the θ_JAeven further to 52.8°C/W.

The ADP3338 is protected against damage due to excessive

power dissipation by its thermal overload protection circuit.

Thermal protection limits the die temperature to a maximum of

16±°C. Under extreme conditions, such as high ambient

temperature and power dissipation where the die temperature

starts to rise above 16±°C, the output current is reduced until

the die temperature has dropped to a safe level.

Current and thermal limit protections are intended to protect

the device against accidental overload conditions. For normal

operation, externally limit the power dissipation of the device

so the junction temperature does not exceed 15±°C.

Figure 22. PCB Layouts

Rev. B | Page 10 of 16

1...7 8 91011 12 13...16

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