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ADP3335ARMZ-2.5RL7 PDF预览

ADP3335ARMZ-2.5RL7

更新时间： 2024-02-04 00:22:34
品牌 Logo 应用领域
亚德诺 - ADI 稳压器调节器光电二极管输出元件
页数 文件大小 规格书
16页 263K
描述
High Accuracy, Ultralow IQ, 500 mA, anyCAP Low Dropout Regulator

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ADP3335ARMZ-2.5RL7 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Not Recommended零件包装代码：TSSOP
包装说明：TSSOP, TSSOP8,.19针数：8
Reach Compliance Code：compliant风险等级：7.6
可调性：FIXED最大回动电压 1：0.37 V
标称回动电压 1：0.2 V最大绝对输入电压：16 V
最大输入电压：12 V最小输入电压：2.9 V
JESD-30 代码：S-PDSO-G8JESD-609代码：e3
长度：3 mm湿度敏感等级：1
功能数量：1输出次数：1
端子数量：8工作温度TJ-Max：150 °C
工作温度TJ-Min：-40 °C最大输出电流 1：0.5 A
最大输出电压 1：2.5575 V最小输出电压 1：2.4425 V
标称输出电压 1：2.5 V封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP8,.19
封装形状：SQUARE封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
调节器类型：FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR座面最大高度：1.1 mm
子类别：Other Regulators表面贴装：YES
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED最大电压容差：2.3%
宽度：3 mmBase Number Matches：1

ADP3335ARMZ-2.5RL7 数据手册

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Data Sheet  
ADP3335  
THEORY OF OPERATION  
The ADP3335 uses a single control loop for regulation and  
reference functions. The output voltage is sensed by a resistive  
voltage divider, R1 and R2, which is varied to provide the  
available output voltage option. Feedback is taken from this  
network by way of a series diode, D1, and a second resistor  
divider, R3 and R4, to the input of an amplifier.  
R4, the values can be chosen to produce a temperature stable  
output. This unique arrangement specifically corrects for the  
loading of the divider, thus avoiding the error resulting from  
base current loading in conventional circuits.  
The patented amplifier controls a new and unique noninverting  
driver that drives the pass transistor, Q1. This special noninverting  
driver enables the frequency compensation to include the load  
capacitor in a pole-splitting arrangement to achieve reduced  
sensitivity to the value, type, and ESR of the load capacitance.  
OUTPUT  
INPUT  
COMPENSATION  
CAPACITOR  
ATTENUATION  
R1  
Q1  
(V  
/V  
)
BANDGAP OUT  
C
D1  
R3  
LOAD  
PTAT  
(a)  
R2  
NONINVERTING  
WIDEBAND  
DRIVER  
g
m
V
OS  
Most LDOs place very strict requirements on the range of ESR  
values for the output capacitor, because they are difficult to  
stabilize due to the uncertainty of load capacitance and resistance.  
The ESR value required to keep conventional LDOs stable,  
moreover, changes depending on load and temperature. These  
ESR limitations make designing with LDOs more difficult  
because of their unclear specifications and extreme variations  
over temperature.  
PTAT  
R
LOAD  
R4  
CURRENT  
ADP3335  
GND  
Figure 23. Functional Block Diagram  
A very high gain error amplifier is used to control this loop. The  
amplifier is constructed in such a way that equilibrium produces a  
large, temperature proportional input offset voltage that is  
repeatable and very well controlled. The temperature proportional  
offset voltage combines with the complementary diode voltage  
to form a virtual band gap voltage implicit in the network, although  
it never appears explicitly in the circuit.  
With the ADP3335, ESR limitations are no longer a source of  
design constraints. The ADP3335 can be used with virtually any  
good quality capacitor and with no constraint on the minimum  
ESR. This innovative design allows the circuit to be stable with  
just a small 1 µF capacitor on the output. Additional advantages  
of the pole-splitting scheme include superior line noise reject-  
tion and very high regulator gain, which lead to excellent line  
and load regulation. Impressive 1.8% accuracy is guaranteed  
over line, load, and temperature.  
This patented design makes it possible to control the loop with  
only one amplifier. This technique also improves the noise  
characteristics of the amplifier by providing more flexibility in  
the trade-off of noise sources that leads to a low noise design.  
Additional features of the circuit include current limit, thermal  
shutdown, and noise reduction.  
The R1 and R2 divider is chosen in the same ratio as the band gap  
voltage to the output voltage. Although the R1 and R2 resistor  
divider is loaded by the D1 diode and a second divider—R3 and  
Rev. C | Page 9 of 16  
 
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