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ADP1763ACPZ-0.9-R7 PDF预览

ADP1763ACPZ-0.9-R7

更新时间： 2024-01-26 10:40:07
品牌 Logo 应用领域
亚德诺 - ADI 输出元件调节器
页数 文件大小 规格书
19页 935K
描述
CMOS Linear Regulator

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ADP1763ACPZ-0.9-R7 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active包装说明：HVQCCN, LCC16,.12SQ,20
针数：16Reach Compliance Code：compliant
风险等级：1.65可调性：FIXED
最大绝对输入电压：2.16 V最大输入电压：1.98 V
最小输入电压：1.1 VJESD-30 代码：S-XQCC-N16
JESD-609代码：e3长度：3 mm
最大电网调整率：0.001188%最大负载调整率：0.0121%
湿度敏感等级：3功能数量：1
输出次数：1端子数量：16
工作温度TJ-Max：125 °C工作温度TJ-Min：-40 °C
最大输出电流 1：3 A最大输出电压 1：0.9135 V
最小输出电压 1：0.8865 V标称输出电压 1：0.9 V
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装等效代码：LCC16,.12SQ,20封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE调节器类型：FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR
座面最大高度：0.8 mm表面贴装：YES
技术：CMOS端子面层：Matte Tin (Sn)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD最大电压容差：1.5%
宽度：3 mmBase Number Matches：1

ADP1763ACPZ-0.9-R7 数据手册

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Data Sheet  
ADP1763  
ABSOLUTE MAXIMUM RATINGS  
The junction to ambient thermal resistance is highly dependent  
on the application and board layout. In applications where high  
maximum power dissipation exists, close attention to thermal  
board design is required. The value of θJA may vary, depending on  
PCB material, layout, and environmental conditions. The specified  
values of θJA are based on a 4-layer, 4 in × 3 in circuit board. For  
details about board construction, refer to JEDEC JESD51-7.  
Table 4.  
Parameter  
Rating  
VIN to GND  
EN to GND  
VOUT to GND  
SENSE to GND  
VREG to GND  
REFCAP to GND  
VADJ to GND  
SS to GND  
−0.3 V to +2.16 V  
−0.3 V to +3.96 V  
−0.3 V to VIN  
−0.3 V to VIN  
−0.3 V to VIN  
−0.3 V to VIN  
−0.3 V to VIN  
−0.3 V to VIN  
−0.3 V to +3.96 V  
−65°C to +150°C  
−40°C to +125°C  
125°C  
ΨJB is the junction to board thermal characterization parameter  
with units of °C/W. ΨJB of the package is based on modeling and  
a calculation using a 4-layer board. The JEDEC JESD51-12  
document, Guidelines for Reporting and Using Package Thermal  
Information, states that thermal characterization parameters are  
not the same as thermal resistances. ΨJB measures the component  
power flowing through multiple thermal paths rather than a single  
path, as in thermal resistance (θJB). Therefore, ΨJB thermal paths  
include convection from the top of the package as well as radiation  
from the package, factors that make ΨJB more useful in real-world  
applications. The maximum junction temperature (TJ) is calculated  
from the board temperature (TB) and power dissipation (PD), using  
the following formula:  
PG to GND  
Storage Temperature Range  
Operating Temperature Range  
Operating Junction Temperature  
Lead Temperature (Soldering, 10 sec)  
300°C  
Stresses at or above those listed under Absolute Maximum  
Ratings may cause permanent damage to the product. This is a  
stress rating only; functional operation of the product at these  
or any other conditions above those indicated in the operational  
section of this specification is not implied. Operation beyond  
the maximum operating conditions for extended periods may  
affect product reliability.  
TJ = TB + (PD × ΨJB)  
Refer to the JEDEC JESD51-8 and JESD51-12 documents for  
more detailed information about ΨJB.  
THERMAL DATA  
THERMAL RESISTANCE  
Absolute maximum ratings apply only individually, not in  
combination. The ADP1763 may be damaged when junction  
temperature limits are exceeded. Monitoring ambient temperature  
does not guarantee that the junction temperature is within the  
specified temperature limits. In applications with high power  
dissipation and poor thermal resistance, the maximum ambient  
temperature may need to be derated.  
θJA and ΨJB are specified for the worst case conditions, that is, a  
device soldered in a circuit board for surface-mount packages.  
Table 5. Thermal Resistance for a 4-Layer 6400 mm2 Copper Size  
Package Type  
θJA  
ΨJB  
Unit  
16-Lead LFCSP  
56  
28.4  
°C/W  
In applications with moderate power dissipation and low printed  
circuit board (PCB) thermal resistance, the maximum ambient  
temperature can exceed the maximum limit as long as the junction  
temperature is within specification limits. The junction temperature  
(TJ) of the device is dependent on the ambient temperature (TA),  
the power dissipation of the device (PD), and the junction to  
ambient thermal resistance of the package (θJA). TJ is calculated  
using the following formula:  
ESD CAUTION  
TJ = TA + (PD × θJA)  
The junction to ambient thermal resistance (θJA) of the package  
is based on modeling and a calculation using a 4-layer board.  
Rev. 0 | Page 5 of 18  
 
 
 
 
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