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ADP160ACBZ-2.8-R7 PDF预览

ADP160ACBZ-2.8-R7

更新时间: 2024-02-16 08:04:59
品牌 Logo 应用领域
亚德诺 - ADI 线性稳压器IC调节器电源电路输出元件PC
页数 文件大小 规格书
20页 500K
描述
Ultralow Quiescent Current, 150 mA, CMOS Linear Regulator

ADP160ACBZ-2.8-R7 技术参数

是否无铅:含铅是否Rohs认证:符合
生命周期:Active零件包装代码:BGA
包装说明:VFBGA, BGA4,2X2,20针数:4
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:0.88
Samacsys Confidence:Samacsys Status:Released
Samacsys PartID:579220Samacsys Pin Count:4
Samacsys Part Category:Integrated CircuitSamacsys Package Category:Other
Samacsys Footprint Name:BGA4C50P2X2_100X100X64Samacsys Released Date:2017-01-11 11:21:59
Is Samacsys:N可调性:FIXED
最大回动电压 1:0.195 V标称回动电压 1:0.105 V
最大绝对输入电压:6.5 V最大输入电压:5.5 V
最小输入电压:2.2 VJESD-30 代码:S-PBGA-B4
JESD-609代码:e3长度:0.965 mm
最大电网调整率:0.00616%最大负载调整率:0.042%
湿度敏感等级:1功能数量:1
输出次数:1端子数量:4
工作温度TJ-Max:125 °C工作温度TJ-Min:-40 °C
最高工作温度:125 °C最低工作温度:-40 °C
最大输出电流 1:0.15 A最大输出电压 1:2.898 V
最小输出电压 1:2.702 V标称输出电压 1:2.8 V
封装主体材料:PLASTIC/EPOXY封装代码:VFBGA
封装等效代码:BGA4,2X2,20封装形状:SQUARE
封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260认证状态:Not Qualified
调节器类型:FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR座面最大高度:0.64 mm
子类别:Other Regulators表面贴装:YES
技术:CMOS端子面层:Matte Tin (Sn)
端子形式:BALL端子节距:0.5 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:30
宽度:0.965 mmBase Number Matches:1

ADP160ACBZ-2.8-R7 数据手册

 浏览型号ADP160ACBZ-2.8-R7的Datasheet PDF文件第11页浏览型号ADP160ACBZ-2.8-R7的Datasheet PDF文件第12页浏览型号ADP160ACBZ-2.8-R7的Datasheet PDF文件第13页浏览型号ADP160ACBZ-2.8-R7的Datasheet PDF文件第15页浏览型号ADP160ACBZ-2.8-R7的Datasheet PDF文件第16页浏览型号ADP160ACBZ-2.8-R7的Datasheet PDF文件第17页 
ADP160/ADP161  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
To guarantee the performance of the ADP160/ADP161, it is  
imperative that the effects of dc bias, temperature, and tolerances  
on the behavior of the capacitors are evaluated for each.  
3.3V  
2.5V  
ENABLE FEATURE  
The ADP160/ADP161 use the EN pin to enable and disable the  
VOUT pin under normal operating conditions. As shown in  
Figure ꢀꢀ, when a rising voltage on EN crosses the active threshold,  
VOUT turns on. When a falling voltage on EN crosses the inactive  
threshold, VOUT turns off.  
EN  
1.2V  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
0
500 1000 1500 2000 2500 3000 3500 4000 4500  
TIME (µs)  
Figure 35. Typical Start-Up Behavior  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
4.2V  
EN  
0.5  
0.7  
0.9  
1.1  
1.3  
1.5  
EN VOLTAGE (V)  
Figure 33. Typical EN Pin Operation  
1.2V  
As shown in Figure ꢀꢀ, the EN pin has hysteresis built in. This  
prevents on/off oscillations that can occur due to noise on the  
EN pin as it passes through the threshold points.  
0
200  
400  
600  
TIME (µs)  
800  
1000  
The EN pin active/inactive thresholds are derived from the VIN  
voltage. Therefore, these thresholds vary with changing input  
voltage. Figure ꢀ4 shows typical EN active/inactive thresholds  
when the input voltage varies from 2.2 V to 5.5 V.  
1.1  
Figure 36. Typical Shutdown Behavior  
CURRENT LIMIT AND THERMAL OVERLOAD  
PROTECTION  
The ADP160/ADP161 are protected against damage due to  
excessive power dissipation by current and thermal overload  
protection circuits. The ADP160/ADP161 are designed to  
current limit when the output load reaches ꢀ20 mA (typical).  
When the output load exceeds ꢀ20 mA, the output voltage is  
reduced to maintain a constant current limit.  
1.0  
0.9  
EN RISE  
0.8  
Thermal overload protection is included, which limits the junction  
temperature to a maximum of 150°C (typical). Under extreme  
conditions (that is, high ambient temperature and power dissipation),  
when the junction temperature starts to rise above 150°C, the  
output is turned off, reducing the output current to zero. When  
the junction temperature drops below 1ꢀ5°C, the output is turned  
on again and the output current is restored to its nominal value.  
EN FALL  
0.7  
0.6  
0.5  
2.0  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
INPUT VOLTAGE (V)  
Figure 34. Typical EN Pin Thresholds vs. Input Voltage  
The start-up and shutdown behavior of the ADP160 is shown in  
Figure ꢀ5 and Figure ꢀ6.  
Rev. 0 | Page 14 of 20  
 
 
 
 
 

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