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ADP1111ARZ-5

更新时间： 2024-02-21 19:17:54
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 开关光电二极管
页数 文件大小 规格书
16页 1044K
描述
1.5 A SWITCHING REGULATOR, 88 kHz SWITCHING FREQ-MAX, PDSO8, SOIC-8

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中文翻译

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ADP1111ARZ-5 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP,针数：8
Reach Compliance Code：unknown风险等级：5.17
模拟集成电路 - 其他类型：SWITCHING REGULATOR控制模式：VOLTAGE-MODE
控制技术：PULSE FREQUENCY MODULATION最大输入电压：30 V
最小输入电压：2 V标称输入电压：3 V
JESD-30 代码：R-PDSO-G8JESD-609代码：e3
长度：4.9 mm湿度敏感等级：1
功能数量：1端子数量：8
最高工作温度：70 °C最低工作温度：
最大输出电流：1.5 A标称输出电压：5 V
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260座面最大高度：1.75 mm
表面贴装：YES切换器配置：BUCK-BOOST
最大切换频率：88 kHz温度等级：COMMERCIAL
端子面层：MATTE TIN端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：3.9 mm
Base Number Matches：1

ADP1111ARZ-5 数据手册

 浏览型号ADP1111ARZ-5的Datasheet PDF文件第10页浏览型号ADP1111ARZ-5的Datasheet PDF文件第11页浏览型号ADP1111ARZ-5的Datasheet PDF文件第12页浏览型号ADP1111ARZ-5的Datasheet PDF文件第14页浏览型号ADP1111ARZ-5的Datasheet PDF文件第15页浏览型号ADP1111ARZ-5的Datasheet PDF文件第16页 
ADP1111  
R
LIM  
This occurs in the step-up mode when the following condition is  
met:  
(EXTERNAL)  
V
IN  
I
V
LIM  
IN  
VOUT + VDIODE  
VIN − VSW  
1
80Ω  
R1  
<
(INTERNAL)  
1 − DC  
Q3  
I
Q1  
ADP1111  
where DC is the ADP1111’s duty cycle. When this relationship  
exists, the inductor current does not go all the way to zero  
during the time that the switch is OFF. When the switch turns  
on for the next cycle, the inductor current begins to ramp up  
from the residual level. If the switch ON time remains constant,  
the inductor current will increase to a high level (see Figure 24).  
This increases output ripple and can require a larger inductor  
and capacitor. By controlling switch current with the ILIM  
resistor, output ripple current can be maintained at the design  
values. Figure 25 illustrates the action of the ILIM circuit.  
200  
SW1  
SW2  
Q1  
DRIVER  
72kHz  
OSC  
Q2  
POWER  
SWITCH  
Figure 26. ADP1111 Current Limit Operation  
The delay through the current limiting circuit is approximately  
1 μs. If the switch ON time is reduced to less than 3 μs, accuracy  
of the current trip-point is reduced. Attempting to program a  
switch ON time of 1 μs or less will produce spurious responses  
in the switch ON time; however, the ADP1111 will still provide  
a properly regulated output voltage.  
PROGRAMMING THE GAIN BLOCK  
The gain block of the ADP1111 can be used as a low-battery  
detector, error amplifier or linear post regulator. The gain block  
consists of an op amp with PNP inputs and an open-collector  
NPN output. The inverting input is internally connected to the  
ADP1111’s 1.25 V reference, while the noninverting input is  
available at the SET pin. The NPN output transistor will sink  
about 300 μA.  
200mA/div  
Figure 27a shows the gain block configured as a low-battery  
monitor. Resistors R1 and R2 should be set to high values to  
reduce quiescent current, but not so high that bias current in  
the SET input causes large errors. A value of 33 kΩ for R2 is a  
good compromise. The value for R1 is then calculated from the  
formula:  
Figure 24.  
VLOBATT − 1. 25 V  
R1 =  
1. 25 V  
R2  
where VLOBATT is the desired low battery trip point. Since the  
gain block output is an open-collector NPN, a pull-up resistor  
should be connected to the positive logic power supply.  
200mA/div  
5V  
R
47k  
L
V
IN  
Figure 25.  
ADP1111  
The internal structure of the ILIM circuit is shown in Figure 26.  
Q1 is the ADP1111’s internal power switch that is paralleled by  
sense transistor Q2. The relative sizes of Q1 and Q2 are scaled  
so that IQ2 is 0.5% of IQ1. Current flows to Q2 through an  
internal 80 Ω resistor and through the RLIM resistor. These two  
resistors parallel the base-emitter junction of the oscillator-  
disable transistor, Q3. When the voltage across R1 and RLIM  
exceeds 0.6 V, Q3 turns on and terminates the output pulse. If  
only the 80 Ω internal resistor is used (i.e. the ILIM pin is  
connected directly to VIN), the maximum switch current will be  
1.5 A. Figure 6 gives RLIM values for lower current-limit values.  
R1  
R2  
1.25V  
REF  
V
BAT  
AO  
TO  
SET  
PROCESSOR  
GND  
33k  
V
–1.25V  
LB  
R1= –––––––––  
35.1μA  
V
LB  
= BATTERY TRIP POINT  
Figure 27a. Setting the Low Battery Detector Trip Point  
0  
REV.  
–12–  
A
1...10111213141516

中文翻译

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