Datasheet > 微控制器和处理器 > 数字信号处理器> ADMCF341

ADMCF341

更新时间： 2024-02-28 23:02:59

品牌	Logo	应用领域
亚德诺 - ADI		闪存
页数	文件大小	规格书
36页	1065K
描述
DashDSP⑩ 28-Lead Flash Mixed-Signal DSP with Enhanced Analog Front End

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

ADMCF341 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	SOIC	包装说明：	SOIC-28
针数：	28	Reach Compliance Code：	not_compliant
ECCN代码：	EAR99	HTS代码：	8542.31.00.01
风险等级：	5.88	Is Samacsys：	N
地址总线宽度：		桶式移位器：	YES
边界扫描：	NO	最大时钟频率：	10 MHz
外部数据总线宽度：		格式：	FIXED POINT
内部总线架构：	MULTIPLE	JESD-30 代码：	R-PDSO-G28
JESD-609代码：	e0	长度：	17.9 mm
低功率模式：	YES	端子数量：	28
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	220	认证状态：	Not Qualified
座面最大高度：	2.65 mm	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	1.27 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	30	宽度：	7.5 mm
uPs/uCs/外围集成电路类型：	DIGITAL SIGNAL PROCESSOR, OTHER	Base Number Matches：	1

ADMCF341 数据手册

ADMCF341

GENERAL DESCRIPTION

to produce high accuracy PWM signals with minimal processor

overhead. The ADMCF341 also contains two 16-bit auxiliary

PWM timer outputs and nine lines of digital I/O.

The ADMCF341 is a low-cost, single-chip DSP-based control-

ler, suitable for permanent magnet synchronous motors, ac

induction motors, and brushless dc motors. The ADMCF341

integrates a 20 MHz, fixed-point DSP core with a complete set

of motor control and system peripherals that permits fast,

efficient development of motor controllers.

Because the ADMCF341 has a limited number of pins, functions

such as the auxiliary PWM timers and the serial communication

ports are multiplexed with the nine programmable digital input/

output (PIO) pins. The pin functions can be independently

selected to allow maximum flexibility for different applications.

The DSP core of the ADMCF341 is completely code-compatible

with the ADSP-21xx DSP family and combines three computa-

tional units, data address generators, and a program sequencer.

The computational units are an ALU, a multiplier/accumulator

(MAC), and a barrel shifter. There are special instructions for

bit manipulation, multiplication (ϫ squared), biased rounding,

and global interrupt masking. The system peripherals are the

power-on reset circuit (POR), the watchdog timer, and two

synchronous serial ports. The serial ports are configurable and

double buffered, with hardware support for UART, SCI, and

SPI port emulation. The ADMCF341 provides 512 ϫ 24-bit

program memory RAM, 4K ϫ 24-bit program memory ROM,

4K ϫ 24-bit program FLASH memory, and 512 ϫ 16-bit data

memory RAM. The user code can be stored and executed from

the flash memory. The program and data memory RAM can be

used for dynamic data storage or can be loaded through the

serial port from an external device as in other ADMCxxx family

parts. The program memory ROM contains a monitor function

as well as useful routines for erasing, programming, and verifying

the flash memory.

DSP CORE ARCHITECTURE OVERVIEW

Figure 3 is an overall block diagram of the DSP core of the

ADMCF341. The flexible architecture and comprehensive

instruction set allow the processor to perform multiple opera-

tions in parallel. In one processor cycle (50 ns with a 10 MHz

CLKIN) the DSP core can:

∑

Generate the next program address

Fetch the next instruction

Perform one or two data moves

Update one or two data address pointers

Perform a computational operation

This all takes place while the processor continues to:

∑

Receive and transmit through the serial ports

Decrement the interval timer

Generate three-phase PWM waveforms for a power inverter

Generate two signals using the 16-bit auxiliary PWM timers

Acquire four analog signals

The motor control peripherals of the ADMCF341 provide a

12-bit analog data acquisition system with six analog input

channels with three dedicated I_SENSEinputs (combining internal

amplification, sampling, and overcurrent PWM shutdown

features) and an internal voltage reference. In addition, a three-

phase, 16-bit, center-based PWM generation unit can be used

Decrement the watchdog timer

INSTRUCTION

FLASH

PROGRAM

MEMORY

4K ꢀ 24

PM ROM

DM RAM

4K ꢀ 24

512 ꢀ 16

DATA

ADDRESS

GENERATOR

DATA

ADDRESS

GENERATOR

PROGRAM

PM RAM

SEQUENCER

512 ꢀ 24

PMA BUS

DMA BUS

PMD BUS

DMD BUS

BUS

EXCHANGE

CONTROL

LOGIC

TIMER

INPUT REGS

ALU

INPUT REGS

SHIFTER

MAC

TRANSMIT REG

RECEIVE REG

COMPANDING

CIRCUITRY

OUTPUT REGS

SERIAL

PORT

R BUS

Figure 3. DSP Core Block Diagram

–7–

REV. 0

1...4 5 678 9 10...36

下载PDF

与ADMCF341相关器件

型号	品牌	描述	获取价格	数据表
ADMCF341BR	ADI	DashDSP⑩ 28-Lead Flash Mixed-Signal DSP with	获取价格
ADMCF341-EVALKIT	ADI	DashDSP⑩ 28-Lead Flash Mixed-Signal DSP with	获取价格
ADMFM2000	ADI	0.5 GHz to 32 GHz Microwave Downconverter	获取价格
ADMFM2001	ADI	7 GHz to 30 GHz, 2 Channel, Microwave Upconverter	获取价格
AD-MJD122	CJ	TO-252-2L	获取价格
AD-MJD31C	CJ	TO-252-2L	获取价格

产品中心

服务支持

精选活动

关于我们

帮助中心

ADMCF341

ADMCF341 技术参数

ADMCF341 数据手册

与ADMCF341相关器件

与ADMCF341相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

ADMCF341

ADMCF341 技术参数

ADMCF341 数据手册

与ADMCF341相关器件

与ADMCF341相关文章

您还可以找

您在本页遇到什么问题？