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ADM8840ACP-REEL7 PDF预览

ADM8840ACP-REEL7

更新时间： 2024-01-16 00:07:33
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER /
页数 文件大小 规格书
11页 847K
描述
SWITCHED CAPACITOR REGULATOR, CQCC32, 5 X 5 MM, LFCSP-32

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ADM8840ACP-REEL7 技术参数

是否无铅：含铅是否Rohs认证：不符合
生命周期：Active零件包装代码：QFN
包装说明：VQCCN,针数：32
Reach Compliance Code：unknown风险等级：5.23
Is Samacsys：N模拟集成电路 - 其他类型：SWITCHED CAPACITOR REGULATOR
最大输入电压：3.6 V最小输入电压：2.7 V
标称输入电压：3.3 VJESD-30 代码：S-CQCC-N32
JESD-609代码：e0长度：5 mm
湿度敏感等级：3功能数量：1
端子数量：32最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：VQCCN封装形状：SQUARE
封装形式：CHIP CARRIER, VERY THIN PROFILE峰值回流温度（摄氏度）：240
认证状态：COMMERCIAL座面最大高度：0.9 mm
表面贴装：YES切换器配置：TRIPLER
技术：CMOS温度等级：INDUSTRIAL
端子面层：TIN LEAD端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：5 mm
Base Number Matches：1

ADM8840ACP-REEL7 数据手册

 浏览型号ADM8840ACP-REEL7的Datasheet PDF文件第4页浏览型号ADM8840ACP-REEL7的Datasheet PDF文件第5页浏览型号ADM8840ACP-REEL7的Datasheet PDF文件第6页浏览型号ADM8840ACP-REEL7的Datasheet PDF文件第8页浏览型号ADM8840ACP-REEL7的Datasheet PDF文件第9页浏览型号ADM8840ACP-REEL7的Datasheet PDF文件第10页 
PRELIMINARY TECHNICAL DATA  
ADM8840  
PIN FUNCTION DESCRIPTION (Contd.)  
Function  
Pin  
Mnemonic  
19  
ADD_OUT  
Voltage Adder Output Pin. This is voltage generated by adding VOUT  
(unregulated output of first stage doubler) to VCC  
.
This summed voltage is  
then used as the supply for the gain stage which generates the Level  
Translator Output Voltage. A 4.7␮F capacitor is recommended for this pin.  
±0ꢀ±1  
±3  
C5+ꢀC5-  
+15VOUT  
C4+ꢀC4-  
C3+ꢀC3-  
C±+ꢀC±-  
-15VOUT  
External capacitor C5 is connected between these pins. A 3.3␮F capacitor is  
recommended.  
+15.0V output pin. This was derived by tripling the +5.0V regulated output. A  
0.±±␮F capacitor is required on this pin.  
±9ꢀ±8  
±5ꢀ±4  
±7ꢀ±6  
30  
External capacitor C4 is connected between these pins. A 0.±±␮F capacitor is  
recommended.  
External capacitor C3 is connected between these pins. A 0.±±␮F capacitor is  
recommended.  
External capacitor C± is connected between these pins. A 0.±±␮F capacitor is  
recommended.  
-15.0V output pin. This was derived by inverting the +15.0V output. A  
0.±±␮F capacitor is required on this pin.  
COM_OUT VOLTAGE  
POWER SEQUENCING  
In order for the TFT panel to power up correctlyꢀ the gate  
The COM Driver section of the ADM8840 can be used to  
generate the alternate frame or line inversion of the COM  
line of the LCD panel. The ADM8840 receives the COM  
clock (with frequency up to 10kHz) from the controller and  
allows programmable conditioning of its amplitude and  
centre voltage through the use of on-board DAC’s 1 and ±.  
This allows programmable elimination of display flicker  
caused by the COM inversion.  
drive supplies must be sequenced such that the -15V supply  
starts up before the +15V supply. The ADM8840 controls  
this sequence. When the device is turned onꢀ the ADM8840  
allow the -15V output to ramp immediatelyꢀ but holds off the  
+15V output. It continues to do this until the negative output  
has reached -3V. At this pointꢀ the positive output is enabled  
and allowed to ramp to +15V. This sequence is highlighted  
in figure ±.  
The COM_OUT amplitude can be programmed from 4.0V  
to 7.0V in steps of ±8mV. The COM_OUT centre voltage  
can be programmed from 0.9V to ±.8V in steps of 14mV.  
Figure 1 below shows a typical output from the COM_OUT  
pin. If programmable operation is not required the DACs can  
be shutdown with the DAC1_SD and DAC±_SD pins and an  
analog voltage applied to the DAC1_IN and DAC±_IN pins  
to set up the amplitude and centre voltage at COM_OUT.  
tDEL AY1  
V
CC  
SHDN  
tR5V  
90%  
tF5V  
+5V  
10%  
tR15V  
90%  
tF15V  
10%  
+15V  
4.0Vto 7.0V  
tDELAY2  
0.9V->1.8V->2.8V  
-15V  
0V  
90%  
10%  
-3V  
tRM15V  
tFM15V  
AMPLITUDE:  
4.0V to 7.0V  
CENTR E  
VOLTAGE:  
0.9V->1.8V->2.8V  
COM_OUT  
Figure 1. COM_OUT Voltage  
0V  
Figure 2. Power Sequence  
–6–  
REV. PrG 2/03  
1...4567891011

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