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ADM2481 PDF预览

ADM2481

更新时间: 2024-09-27 12:19:59
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
20页 282K
描述
Half-Duplex, iCoupler Isolated RS-485 Transceiver

ADM2481 数据手册

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Half-Duplex, iCoupler  
Isolated RS-485 Transceiver  
ADM2481  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
V
V
DD2  
DD1  
RS-485 transceiver with electrical data isolation  
Complies with ANSI TIA/EIA-485-A and ISO 8482: 1987(E)  
500 kbps data rate  
ADM2481  
DE  
Slew rate-limited driver outputs  
Low power operation: 2.5 mA maximum  
Suitable for 5 V or 3.3 V operations (VDD1  
TxD  
)
High common-mode transient immunity: >25 kV/μs  
True fail-safe receiver inputs  
Chatter-free power-up/power-down protection  
256 nodes on bus  
A
B
RxD  
RE  
Thermal shutdown protection  
GND  
GND  
2
1
Safety and regulatory approvals (pending)  
UL recognition: 2500 V rms for 1 minute per  
UL 1577 (pending)  
Figure 1.  
VDE certificates of conformity (pending)  
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12  
V
IORM = 560 V peak  
Operating temperature range: −40°C to +85°C  
APPLICATIONS  
Low power RS-485/RS-422 networks  
Isolated interfaces  
Building control networks  
Multipoint data transmission systems  
GENERAL DESCRIPTION  
The ADM2481 differential bus transceiver is an integrated,  
galvanically isolated component designed for bidirectional data  
communication on balanced, multipoint bus transmission lines.  
It complies with ANSI EIA/TIA-485-A and ISO 8482: 1987(E).  
Using iCoupler® technology from Analog Devices, Inc., the  
ADM2481 combines a 3-channel isolator, a three-state diffe-  
rential line driver, and a differential input receiver into a single  
package. The logic side of the device is powered with either a  
5 V or 3 V supply, and the bus side uses a 5 V supply only.  
to form a differential I/O port. When the driver is disabled or  
when VDD1 or VDD2 = 0 V, this imposes minimal loading on  
the bus. An active-high receiver disable feature, which causes  
the receiver output to enter a high impedance state, is provided  
as well.  
The receiver inputs have a true fail-safe feature that ensures a  
logic-high receiver output level when the inputs are open or  
shorted. This guarantees that the receiver outputs are in a  
known state before communication begins and at the point  
when communication ends.  
The ADM2481 is slew-limited to reduce reflections with improp-  
erly terminated transmission lines. The controlled slew rate  
limits the data rate to 500 kbps. The input impedance of the  
device is 96 kΩ, allowing up to 256 transceivers on the bus. Its  
driver has an active-high enable feature. The driver differential  
outputs and receiver differential inputs are connected internally  
Current limiting and thermal shutdown features protect against  
output short circuits and bus contention situations that might  
cause excessive power dissipation. The part is fully specified  
over the industrial temperature range of −40°C to +85°C and is  
available in a 16-lead, wide body SOIC package.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2010 Analog Devices, Inc. All rights reserved.  
 
 
 

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