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ADM206ARZ PDF预览

ADM206ARZ

更新时间: 2024-01-12 17:17:20
品牌 Logo 应用领域
亚德诺 - ADI 驱动器接口集成电路光电二极管
页数 文件大小 规格书
16页 218K
描述
0.1 muF, 5 V Powered CMOS RS-232 Drivers/Receivers

ADM206ARZ 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Contact Manufacturer零件包装代码:SOIC
包装说明:SOP,针数:24
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.24
差分输出:NO驱动器位数:4
输入特性:SCHMITT TRIGGER接口集成电路类型:LINE TRANSCEIVER
接口标准:EIA-232-E; V.28JESD-30 代码:R-PDSO-G24
JESD-609代码:e0长度:15.4 mm
湿度敏感等级:1功能数量:3
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):240
最大接收延迟:2000 ns接收器位数:3
座面最大高度:2.65 mm最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:7.5 mmBase Number Matches:1

ADM206ARZ 数据手册

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ADM206–ADM211/ADM213  
S1  
S2  
S3  
V+  
GND  
FROM  
VOLTAGE  
DOUBLER  
GENERAL INFORMATION  
+
+
C2  
C4  
S4  
The ADM206–ADM2±±/ADM2±3 family of ꢀR-232 drivers/  
receivers is designed to solve interface problems by meeting the  
EIA-232-E specifications while using a single digital 5 V supply.  
The EIA-232-E standard requires transmitters that will deliver  
±5 V minimum on the transmission channel and receivers that  
can accept signal levels down to ±3 V. The ADM206–ADM2±±/  
ADM2±3 meet these requirements by integrating step-up voltage  
converters and level shifting transmitters and receivers onto the  
same chip. CMOR technology is used to keep the power dissi-  
pation to an absolute minimum. A comprehensive range of  
transmitter/receiver combinations is available to cover most  
communication needs. The ADM206–ADM2±±/ADM2±3 are  
modifications, enhancements, and improvements to the AD230–  
AD24± family and derivatives thereof. They are essentially plug-  
in compatible and do not have materially different applications.  
GND  
V– = –(V+)  
INTERNAL  
OSCILLATOR  
Figure 23. Charge Pump Voltage Inverter  
Capacitors C3 and C4 are used to reduce the output ripple.  
Their values are not critical and can be reduced if higher levels  
of ripple are acceptable. The charge pump capacitors C± and C2  
may also be reduced at the expense of higher output impedance  
on the V+ and V– supplies.  
The V+ and V– supplies may also be used to power external  
circuitry if the current requirements are small.  
Transmitters (Drivers)  
The drivers convert TTL/CMOR input levels into EIA-232-E  
output levels. With VCC = +5 V and driving a typical EIA-232-E  
load, the output voltage swing is ±9 V. Even under worst-case  
conditions, the drivers are guaranteed to meet the ±5 V EIA-  
232-E minimum requirement.  
The ADM206, ADM2±±, and ADM2±3 are particularly useful in  
battery-powered systems because they feature a low power shut-  
down mode that reduces power dissipation to less than 5 µW.  
The ADM209 includes only a negative charge pump converter  
and is intended for applications where a +±2 V is available.  
The input threshold levels are both TTL- and CMOR-compatible  
with the switching threshold set at VCC/4. With a nominal VCC  
5 V, the switching threshold is ±.25 V typical. Unused inputs  
may be left unconnected, because an internal 400 kΩ pull-up  
resistor pulls them high, forcing the outputs into a low state.  
=
To facilitate sharing a common line or for connection to a  
microprocessor data bus, the ADM206, the ADM209, the  
ADM2±±, and the ADM2±3 feature an enable ( ) function.  
EN  
When the receivers are disabled, their outputs are placed in a  
high impedance state.  
As required by the EIA-232-E standard, the slew rate is limited  
to less than 30 V/µs, without the need for an external slew  
limiting capacitor, and the output impedance in the power-off  
state is greater than 300 Ω.  
CIRCUIT DESCRIPTION  
The internal circuitry in the ADM206–ADM2±±/ADM2±3  
consists of three main sections: (a) a charge pump voltage  
converter; (b) ꢀR-232-to-TTL/CMOR receivers; and  
(c) TTL/CMOR-to-ꢀR-232 transmitters.  
Receivers  
The receivers are inverting level shifters that accept EIA-232-E  
input levels (±5 V to ±±5 V) and translate them into 5 V TTL/  
CMOR levels. The inputs have internal 5 kΩ pull-down resistors  
to ground and are also protected against overvoltages of up to  
±30 V. The guaranteed switching thresholds are 0.8 V minimum  
and 2.4 V maximum, well within the ±3 V EIA-232-E require-  
ment. The low level threshold is deliberately positive, since it  
ensures that an unconnected input will be interpreted as a  
low level.  
Charge Pump DC-to-DC Voltage Converter  
The charge pump voltage converter consists of an oscillator and  
a switching matrix. The converter generates a ±±0 V supply  
from the 5 V input. This is done in two stages using a switched  
capacitor technique, as illustrated in Figure 22 and Figure 23.  
First, the 5 V input supply is doubled to ±0 V using capacitor  
C± as the charge storage element. The ±0 V level is then  
inverted to generate –±0 V using C2 as the storage element.  
The receivers have Rchmitt-trigger inputs with a hysteresis level  
of 0.65 V. This ensures error-free reception for both noisy  
inputs and inputs with slow transition times.  
S1  
S3  
V
V+ = 2V  
CC  
CC  
+
+
C1  
C3  
S2  
S4  
V
GND  
CC  
Shutdown (SD)  
The ADM206–ADM2±±/ADM2±3 feature a control input that  
may be used to disable the part and reduce the power consump-  
ion to less than 5 ΩW. This is very useful in battery-operated  
systems. During shutdown, the charge pump is turned off, the  
transmitters are disabled, and all receivers except ꢀ4 and ꢀ5 on  
the ADM2±3 are put into a high impedance disabled state.  
INTERNAL  
OSCILLATOR  
Figure 22. Charge Pump Voltage Doubler  
Rev. C | Page 11 of 16  
 
 

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