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ADM1062ACPZ-REEL7 PDF预览

ADM1062ACPZ-REEL7

更新时间: 2024-01-24 07:30:26
品牌 Logo 应用领域
亚德诺 - ADI 电源电路电源管理电路监控
页数 文件大小 规格书
36页 629K
描述
Super Sequencer with Margining Control and Temperature Monitoring

ADM1062ACPZ-REEL7 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN, LCC40,.24SQ,20针数:40
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.37
Is Samacsys:N可调阈值:YES
模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUITJESD-30 代码:S-XQCC-N40
JESD-609代码:e3长度:6 mm
湿度敏感等级:3信道数量:10
功能数量:1端子数量:40
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC40,.24SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:3/5 V认证状态:Not Qualified
座面最大高度:1 mm子类别:Power Management Circuits
最大供电电流 (Isup):6 mA标称供电电压 (Vsup):2.7 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:6 mm
Base Number Matches:1

ADM1062ACPZ-REEL7 数据手册

 浏览型号ADM1062ACPZ-REEL7的Datasheet PDF文件第28页浏览型号ADM1062ACPZ-REEL7的Datasheet PDF文件第29页浏览型号ADM1062ACPZ-REEL7的Datasheet PDF文件第30页浏览型号ADM1062ACPZ-REEL7的Datasheet PDF文件第32页浏览型号ADM1062ACPZ-REEL7的Datasheet PDF文件第33页浏览型号ADM1062ACPZ-REEL7的Datasheet PDF文件第34页 
ADM1062  
To erase a page of EEPROM memory. EEPROM memory  
can be written to only if it is unprogrammed. Before writing  
to one or more EEPROM memory locations that are already  
programmed, the page(s) containing those locations must  
first be erased. EEPROM memory is erased by writing a  
command byte.  
SMBus PROTOCOLS FOR RAM AND EEPROM  
The ADM1062 contains volatile registers (RAM) and non-  
volatile registers (EEPROM). User RAM occupies Address 0x00  
to Address 0xDF; the EEPROM occupies Address 0xF800 to  
Address 0xFBFF.  
Data can be written to and read from both the RAM and the  
EEPROM as single data bytes. Data can be written only to unpro-  
grammed EEPROM locations. To write new data to a programmed  
location, the location contents must first be erased. EEPROM  
erasure cannot be done at the byte level. The EEPROM is arranged  
as 32 pages of 32 bytes each, and an entire page must be erased.  
The master sends a command code telling the slave device  
to erase the page. The ADM1062 command code for a page  
erasure is 0xFE (1111 1110). Note that for a page erasure to  
take place, the page address must be given in the previous  
write word transaction (see the Write Byte/Word section).  
In addition, Bit 2 in the UPDCFG register (Address 0x90)  
must be set to 1.  
Page erasure is enabled by setting Bit 2 in the UPDCFG register  
(Address 0x90) to 1. If this bit is not set, page erasure cannot  
occur, even if the command byte (0xFE) is programmed across  
the SMBus.  
1
2
3
4
5
6
COMMAND  
BYTE  
(0xFE)  
SLAVE  
ADDRESS  
S
W
A
A
P
WRITE OPERATIONS  
Figure 43. EEPROM Page Erasure  
The SMBus specification defines several protocols for different  
types of read and write operations. The following abbreviations  
are used in Figure 42 to Figure 50:  
As soon as the ADM1062 receives the command byte,  
page erasure begins. The master device can send a stop  
command as soon as it sends the command byte. Page  
erasure takes approximately 20 ms. If the ADM1062 is  
accessed before erasure is complete, it responds with a no  
acknowledge (NACK).  
S = Start  
P = Stop  
R = Read  
W = Write  
A = Acknowledge  
Write Byte/Word  
In a write byte/word operation, the master device sends a  
command byte and one or two data bytes to the slave device,  
as follows:  
A
= No acknowledge  
The ADM1062 uses the following SMBus write protocols.  
1. The master device asserts a start condition on SDA.  
2. The master sends the 7-bit slave address followed by the  
write bit (low).  
3. The addressed slave device asserts an ACK on SDA.  
4. The master sends a command code.  
5. The slave asserts an ACK on SDA.  
6. The master sends a data byte.  
7. The slave asserts an ACK on SDA.  
8. The master sends a data byte or asserts a stop condition.  
9. The slave asserts an ACK on SDA.  
10. The master asserts a stop condition on SDA to end  
the transaction.  
Send Byte  
In a send byte operation, the master device sends a single  
command byte to a slave device, as follows:  
1. The master device asserts a start condition on SDA.  
2. The master sends the 7-bit slave address followed by the  
write bit (low).  
3. The addressed slave device asserts an acknowledge (ACK)  
on SDA.  
4. The master sends a command code.  
5. The slave asserts an ACK on SDA.  
6. The master asserts a stop condition on SDA, and the  
transaction ends.  
In the ADM1062, the write byte/word protocol is used for three  
purposes:  
In the ADM1062, the send byte protocol is used for two purposes:  
To write a register address to the RAM for a subsequent single  
byte read from the same address, or for a block read or a  
block write starting at that address, as shown in Figure 42.  
To write a single byte of data to the RAM. In this case, the  
command byte is RAM Address 0x00 to RAM Address 0xDF,  
and the only data byte is the actual data, as shown in Figure 44.  
1
2
3
4
5
6
1
2
3
4
5
6
7
8
RAM  
SLAVE  
ADDRESS  
RAM  
S
W
A
ADDRESS  
A
P
SLAVE  
ADDRESS  
S
W
A
ADDRESS  
A
DATA  
A
P
(0x00 TO 0xDF)  
(0x00 TO 0xDF)  
Figure 42. Setting a RAM Address for Subsequent Read  
Figure 44. Single Byte Write to the RAM  
Rev. C | Page 31 of 36  
 
 
 
 
 

ADM1062ACPZ-REEL7 替代型号

型号 品牌 替代类型 描述 数据表
ADM1062ACPZ ADI

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