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ADM1062ACPZ PDF预览

ADM1062ACPZ

更新时间: 2024-01-26 13:21:40
品牌 Logo 应用领域
亚德诺 - ADI 电源电路电源管理电路监控
页数 文件大小 规格书
36页 629K
描述
Super Sequencer with Margining Control and Temperature Monitoring

ADM1062ACPZ 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFP
包装说明:TFQFP, TQFP48,.35SQ针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.36
Is Samacsys:N可调阈值:YES
模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUITJESD-30 代码:S-PQFP-G48
JESD-609代码:e3长度:7 mm
湿度敏感等级:3信道数量:10
功能数量:1端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TFQFP
封装等效代码:TQFP48,.35SQ封装形状:SQUARE
封装形式:FLATPACK, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:3/5 V认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Power Management Circuits
最大供电电流 (Isup):6 mA标称供电电压 (Vsup):2.7 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:7 mm
Base Number Matches:1

ADM1062ACPZ 数据手册

 浏览型号ADM1062ACPZ的Datasheet PDF文件第29页浏览型号ADM1062ACPZ的Datasheet PDF文件第30页浏览型号ADM1062ACPZ的Datasheet PDF文件第31页浏览型号ADM1062ACPZ的Datasheet PDF文件第33页浏览型号ADM1062ACPZ的Datasheet PDF文件第34页浏览型号ADM1062ACPZ的Datasheet PDF文件第35页 
ADM1062  
7. The slave asserts an ACK on SDA.  
8. The master sends N data bytes.  
9. The slave asserts an ACK on SDA after each data byte.  
10. The master asserts a stop condition on SDA to end the  
transaction.  
To set up a 2-byte EEPROM address for a subsequent read,  
write, block read, block write, or page erase. In this case, the  
command byte is the high byte of EEPROM Address 0xF8  
to EEPROM Address 0xFB. The only data byte is the low  
byte of the EEPROM address, as shown in Figure 45.  
1
2
3
4
5
6
7
8
9
10  
P
1
2
3
4
5
6
7
8
EEPROM  
ADDRESS  
HIGH BYTE  
(0xF8 TO 0xFB)  
EEPROM  
ADDRESS  
LOW BYTE  
(0x00 TO 0xFF)  
SLAVE  
ADDRESS  
COMMAND 0xFC  
(BLOCK WRITE)  
BYTE  
COUNT  
DATA  
1
DATA  
2
DATA  
A
N
SLAVE  
ADDRESS  
S
W
A
A
A
A
A
S
W
A
A
A
P
Figure 45. Setting an EEPROM Address  
Figure 47. Block Write to the EEPROM or RAM  
Because a page consists of 32 bytes, only the three MSBs  
of the address low byte are important for page erasure. The  
lower five bits of the EEPROM address low byte specify the  
addresses within a page and are ignored during an erase  
operation.  
To write a single byte of data to the EEPROM. In this case,  
the command byte is the high byte of EEPROM Address 0xF8  
to EEPROM Address 0xFB. The first data byte is the low  
byte of the EEPROM address, and the second data byte is  
the actual data, as shown in Figure 46.  
Unlike some EEPROM devices that limit block writes to within  
a page boundary, there is no limitation on the start address  
when performing a block write to EEPROM, except when  
There must be at least N locations from the start address to  
the highest EEPROM address (0xFBFF) to avoid writing to  
invalid addresses.  
An address crosses a page boundary. In this case, both  
pages must be erased before programming.  
Note that the ADM1062 features a clock extend function for  
writes to EEPROM. Programming an EEPROM byte takes  
approximately 250 μs, which limits the SMBus clock for repeated  
or block write operations. The ADM1062 pulls SCL low and  
extends the clock pulse when it cannot accept any more data.  
1
2
3
4
5
6
7
8
9
10  
EEPROM  
ADDRESS  
HIGH BYTE  
(0xF8 TO 0xFB)  
EEPROM  
ADDRESS  
LOW BYTE  
(0x00 TO 0xFF)  
SLAVE  
ADDRESS  
S
W
A
A
A
DATA  
A
P
Figure 46. Single Byte Write to the EEPROM  
READ OPERATIONS  
Block Write  
The ADM1062 uses the following SMBus read protocols.  
Receive Byte  
In a block write operation, the master device writes a block of  
data to a slave device. The start address for a block write must  
have been set previously. In the ADM1062, a send byte opera-  
tion sets a RAM address, and a write byte/word operation sets  
an EEPROM address, as follows:  
In a receive byte operation, the master device receives a single  
byte from a slave device, as follows:  
1. The master device asserts a start condition on SDA.  
2. The master sends the 7-bit slave address followed by the  
read bit (high).  
3. The addressed slave device asserts an ACK on SDA.  
4. The master receives a data byte.  
5. The master asserts a NACK on SDA.  
6. The master asserts a stop condition on SDA, and the  
transaction ends.  
1. The master device asserts a start condition on SDA.  
2. The master sends the 7-bit slave address followed by  
the write bit (low).  
3. The addressed slave device asserts an ACK on SDA.  
4. The master sends a command code that tells the slave  
device to expect a block write. The ADM1062 command  
code for a block write is 0xFC (1111 1100).  
5. The slave asserts an ACK on SDA.  
In the ADM1062, the receive byte protocol is used to read a  
single byte of data from a RAM or EEPROM location whose  
address has previously been set by a send byte or write  
byte/word operation, as shown in Figure 48.  
6. The master sends a data byte that tells the slave device how  
many data bytes are being sent. The SMBus specification  
allows a maximum of 32 data bytes in a block write.  
1
2
3
4
5
6
SLAVE  
ADDRESS  
S
R
A
DATA  
A
P
Figure 48. Single Byte Read from the EEPROM or RAM  
Rev. C | Page 32 of 36  
 
 
 
 
 

ADM1062ACPZ 替代型号

型号 品牌 替代类型 描述 数据表
ADM1062ACPZ-REEL7 ADI

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