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ADL5561ACPZ-R7

更新时间： 2024-02-27 20:27:03
品牌 Logo 应用领域
亚德诺 - ADI 放大器
页数 文件大小 规格书
24页 565K
描述
2.9 GHz Ultralow Distortion RF/IF Differential Amplifier

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ADL5561ACPZ-R7 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFN
包装说明：HVQCCN,针数：16
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.31.00.01风险等级：1.62
JESD-30 代码：S-XQCC-N16JESD-609代码：e3
长度：3 mm湿度敏感等级：3
功能数量：1端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：NOT SPECIFIED座面最大高度：1 mm
标称供电电压：3.3 V表面贴装：YES
电信集成电路类型：RF AND BASEBAND CIRCUIT温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：3 mm
Base Number Matches：1

ADL5561ACPZ-R7 数据手册

 浏览型号ADL5561ACPZ-R7的Datasheet PDF文件第16页浏览型号ADL5561ACPZ-R7的Datasheet PDF文件第17页浏览型号ADL5561ACPZ-R7的Datasheet PDF文件第18页浏览型号ADL5561ACPZ-R7的Datasheet PDF文件第20页浏览型号ADL5561ACPZ-R7的Datasheet PDF文件第21页浏览型号ADL5561ACPZ-R7的Datasheet PDF文件第22页 
ADL5561  
To realize the minimum gain (6 dB into a 200 ꢀ load), Input 1  
(VIN1 and VIP1) must be used by installing 0 ꢀ resistors at R3  
and R4, leaving R5 and R6 open. R1 and R2 must be 33 ꢀ for a  
50 Ω input impedance.  
SOLDERING INFORMATION  
On the underside of the chip scale package, there is an exposed  
compressed paddle. This paddle is internally connected to the  
ground of the chip. Solder the paddle to the low impedance  
ground plane on the PCB to ensure the specified electrical  
performance and to provide thermal relief. To further reduce  
thermal impedance, the ground planes on all layers under the  
paddle should be stitched together with vias.  
Likewise, driving Input 2 (VIN2 and VIP2) realizes the middle  
gain (12 dB into a 200 ꢀ load) by installing 0 ꢀ at R5 and R6  
and leaving R3 and R4 open. R1 and R2 must be 29 ꢀ for a  
50 Ω input impedance.  
For the maximum gain (15.5 dB into a 200 ꢀ load), both inputs  
are driven by installing 0 ꢀ resistors at R3, R4, R5, and R6. R1  
and R2 must be 40.2 ꢀ for a 50 Ω input impedance.  
EVALUATION BOARD  
Figure 43 shows the schematic of the ADL5561 evaluation board.  
The board is powered by a single supply in the 3 V to 3.6 V range.  
The power supply is decoupled by 10 μF and 0.1 μF capacitors  
The balanced input and output interfaces are converted to  
single ended with a pair of baluns (M/A-COM ETC1-1-13).  
The balun at the input, T1, provides a 50 Ω single-ended-to-  
differential transformation. The output balun, T2, and the  
matching components are configured to provide a 200 ꢀ to 50 ꢀ  
impedance transformation with an insertion loss of about 17 dB.  
GND ENBL  
Table 14 details the various configuration options of the evaluation  
board. Figure 44 and Figure 45 show the component and circuit  
layouts of the evaluation board.  
VPOS  
16  
GND GND GND GND  
VIP2 ENBL  
15  
14  
13  
P1  
C8  
0.1µF  
1
2
3
4
12  
AGND  
T2  
R5  
C1  
J3  
0Ω  
0.01µF  
R9  
34.8Ω  
R11  
OPEN  
R7  
T1  
C9  
VIP1  
VOP 11  
84.5Ω  
J1  
0.01µF  
R1  
40.2Ω  
R3  
0Ω  
ADL5561  
C2  
0.01µF  
10  
C13  
0.1µF  
VIN1  
VIN2  
VON  
R10  
34.8Ω  
R8  
84.5Ω  
C10  
0.01µF  
C12  
0.1µF  
R2  
40.2Ω  
R4  
0Ω  
VOCM  
9
C11  
0.1µF  
VCC VCC VCC VCC  
R6  
0Ω  
5
6
7
8
J2  
VPOS  
C3  
10µF  
C4  
0.1µF  
C5  
0.1µF  
C6  
0.1µF  
C7  
0.1µF  
Figure 43. Evaluation Board Schematic  
Table 14. Evaluation Board Configuration Options  
Component  
Description  
Default Condition  
VPOS, GND  
Ground and Supply Vector Pins.  
VPOS, GND = installed  
C3, C4, C5,  
C6, C7, C11  
Power Supply Decoupling. The supply decoupling consists of a 10 μF capacitor (C3)  
to ground. C4 to C7 are bypass capacitors. C11 ac couples VREF to ground.  
C3 = 10 μF (Size D),  
C4, C5, C6, C7, C11 = 0.1 μF (Size 0402)  
J1, R1, R2, R3, Input Interface. The SMA labeled J1 is the input. T1 is a 1-to-1 impedance ratio  
R4, R5, R6, C1, balun to transform a single-ended input into a balanced differential signal. C1 and  
J1 = installed,  
R1, R2 = 40.2 Ω (Size 0402),  
R3, R4, R5, R6 = 0 Ω (Size 0402),  
C1, C2 = 0.01 μF (Size 0402),  
C12 = 0.1 μF (Size 0402)  
T1 = ETC1-1-13 (M/A-COM)  
C2, C12, T1  
C2 provide ac-coupling. C12 is a bypass capacitor. R1 and R2 provide a differential  
50 Ω input termination. R3 to R6 are used to select the input for the pin-strappable  
gain. Maximum gain: R3, R4, R5, R6 = 0 Ω; R1, R2 = 40.2 Ω. Middle gain: R5, R6 = 0 Ω;  
R3, R4 = open; R1, R2 = 33 Ω. Minimum gain: R3, R4 = 0 Ω; R5, R6 = open; R1, R2 = 29 Ω.  
J3, R7, R8, R9, Output Interface. The SMA labeled J3 is the output. T2 is a 1-to-1 impedance  
R10, R11, C9, ratio balun to transform a balanced differential signal to a single-ended signal.  
J3 = installed,  
R7, R8 = 84.5 Ω (Size 0402),  
R9, R10 = 34.8 Ω (Size 0402),  
R11 = open (Size 0402),  
C9, C10 = 0.01 μF (Size 0402),  
C13 = 0.1 μF (Size 0402)  
T2 = ETC1-1-13 (M/A-COM)  
C10, C13, T2  
C13 is a bypass capacitor. R7, R8, R9, and R10 are provided for generic placement  
of matching components. The evaluation board is configured to provide a 200 Ω  
to 50 Ω impedance transformation with an insertion loss of 17 dB. C9 and C10  
provide ac-coupling.  
ENBL, P1, C8  
Device Enable. C8 is a bypass capacitor. When the P1 jumper is set toward the VPOS  
label, the ENBL pin is connected to the supply, enabling the device. In the opposite  
direction, toward the GND label, the ENBL pin is grounded, putting the device in  
power-down mode.  
ENBL, P1 = installed,  
C8 = 0.1 μF (Size 0402)  
Rev. B | Page 19 of 24  
 
 
 
 
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ADL5561ACPZ-R7 替代型号

型号 品牌 替代类型 描述 数据表
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