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ADL5303ACPZ-R2 PDF预览

ADL5303ACPZ-R2

更新时间: 2024-01-26 14:29:51
品牌 Logo 应用领域
亚德诺 - ADI 转换器模拟IC信号电路
页数 文件大小 规格书
24页 468K
描述
160 dB Range 100 pA to 10 mA Low Cost Logarithmic Converter

ADL5303ACPZ-R2 技术参数

Source Url Status Check Date:2013-05-01 14:56:39.132是否无铅: 含铅
是否Rohs认证: 符合生命周期:Active
包装说明:HVQCCN, LCC16,.12SQ,20针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.31.00.01风险等级:5.56
模拟集成电路 - 其他类型:ANALOG CIRCUITJESD-30 代码:S-XQCC-N16
JESD-609代码:e3长度:3 mm
湿度敏感等级:3功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装等效代码:LCC16,.12SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified座面最大高度:0.8 mm
子类别:Other Analog ICs最大供电电流 (Isup):5.6 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:3 mmBase Number Matches:1

ADL5303ACPZ-R2 数据手册

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Data Sheet  
ADL5303  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
PIN 1  
INDICATOR  
12 VPS1  
11 VOUT  
10 VPS2  
NC  
VSUM  
INPT  
1
2
3
4
ADL5303  
TOP VIEW  
(Not to Scale)  
VSUM  
9 BFIN  
NOTES  
1. PINS LABELED NC CAN BE ALLOWED TO FLOAT, BUT  
IT IS BETTER TO CONNECT THESE PINS TO GROUND.  
AVOID ROUTING HIGH SPEED SIGNALS THROUGH  
THESE PINS BECAUSE NOISE COUPLING MAY RESULT.  
2. EXPOSED PAD. CONNECT THE EXPOSED PAD TO THE  
VSUM PINS TO PROVIDE LOW LEAKAGE GUARD.  
Figure 2. Pin Configuration  
Table 3. Pin Function Descriptions  
Pin No.  
Mnemonic  
Description  
1
NC  
Pins labeled NC can be allowed to float, but it is better to connect these pins to ground. Avoid routing high  
speed signals through these pins because noise coupling may result.  
2, 4  
3
VSUM  
INPT  
Guard Pins. VSUM is used to shield the INPT current line.  
Photodiode Current Input. Connect this pin to the photodiode anode (the photo current flows toward INPT).  
5
VPDB  
Photodiode Biaser Output. Connect this pin to the photodiode cathode when using adaptive bias control;  
otherwise, leave this pin floating.  
6
7
8
9
VREF  
ACOM  
VLOG  
BFIN  
VPS2  
VOUT  
VPS1  
BFNG  
GND  
Voltage Reference Output of 2 V.  
Analog Reference Ground.  
Output of the Logarithmic Front-End Processor. ROUT = 5 kΩ to ground.  
Buffer Amplifier Noninverting Input (High Impedance).  
Positive Supply, VPS (3.0 V to 5.5 V).  
Buffer Output; Low Impedance.  
Positive Supply, VPS (3.0 V to 5.5 V).  
Buffer Amplifier Inverting Input.  
Power Supply Ground Connection.  
10  
11  
12  
13  
14, 15  
16  
17  
PWDN  
EPAD  
Power-Down Control Input. Device is active when PWDN is taken low.  
Exposed Pad. Connect the exposed pad to the VSUM pins to provide low leakage guard.  
Rev. 0 | Page 5 of 24  
 

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