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ADL5304-EVALZ

更新时间： 2024-01-06 06:25:10

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
32页	912K
描述
High Speed, 200 dB Range

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技术参数
数据手册

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ADL5304-EVALZ 技术参数

Source Url Status Check Date：	2013-05-01 14:56:39.151	是否无铅：	含铅
是否Rohs认证：	符合	生命周期：	Active
零件包装代码：	QFN	包装说明：	HVQCCN, LCC32,.2SQ,20
针数：	32	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8542.33.00.01
风险等级：	5.04	Is Samacsys：	N
模拟集成电路 - 其他类型：	ANALOG CIRCUIT	JESD-30 代码：	S-XQCC-N32
长度：	5 mm	功能数量：	1
端子数量：	32	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	UNSPECIFIED
封装代码：	HVQCCN	封装等效代码：	LCC32,.2SQ,20
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	5 V
认证状态：	Not Qualified	座面最大高度：	1 mm
子类别：	Other Analog ICs	最大供电电流 (Isup)：	17 mA
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V	表面贴装：	YES
温度等级：	INDUSTRIAL	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	5 mm
Base Number Matches：	1

ADL5304-EVALZ 数据手册

High Speed, 200 dB Range,

Logarithmic Converter

ADL5304

Data Sheet

A single positive supply of 5 V is all that is required for operation

over a specified 1 pA to 3 mA input range. Dual-supply operation

extends the specified input current range to 10 mA.

FEATURES

Optimized for very fast response at all input currents

Overall bandwidth of >4 MHz for inputs >1 μA

Bandwidth: 25 kHz at input of 1 nA and 350 kHz at 10 nA

10 decades of input range: 1 pA to 10 mA

Law conformance: 0.25 dB from 100 pA to 100 μA

Log ratio or fixed-intercept operation

Precision voltage references and reference current

Adaptive photodiode (PD) bias for low dark current

Programmable log slope and intercept

Default log slope of 10 mV/dB at VLOG pin

Single- or dual-supply operation

The ADL5304 accepts two current inputs to the logarithmic

argument. The numerator input, I_NUM, flows in the collector of an

NPN transistor, connected in a feedback path around a low offset

JFET amplifier. The denominator current, I_DEN, is treated in the

same way, which allows for log ratio operation. The input summing

nodes (INUM and IDEN) operate at a constant default voltage of

1.5 V. The VSM1 to VSM4 pins flank the INUM and IDEN inputs

to provide a guard voltage to minimize leakage currents.

Adaptive photodiode biasing is provided for optical measurements.

A monitor current 1.1 times I_NUMis output at the IMON pin, and

an external resistor, R_MNTR, at 10 times the photodiode series

resistance (R_S) applies a voltage across the photodiode that

1st order keeps the internal PD junction at 0 V to minimize

dark current.

APPLICATIONS

High accuracy optical power measurement

Wide range baseband log compression

Versatile detector for high speed APC loops

GENERAL DESCRIPTION

The VLOG output is buffered and can be rescaled through

internal gain setting resistors. The internal I_LOGvaries from

−400 μA to +400 μA as I_NUMchanges over 10 decades from 1 pA

to 10 mA. This corresponds to 0.5 V to 2.5 V at the VLOG pin

in the default configuration shown in Figure 1.

The ADL5304 is a high speed logarithmic converter with fast

response and low noise over a 200 dB (1 pA to 10 mA) measure-

ment range. The ADL5304 provides a nominal logarithmic slope of

10 mV/dB (200 mV/decade); other values are easily configured.

Logarithmic intercept can be programmed over a wide range

with the internal 100 nA current source or externally for log ratio

applications. The default intercept value of 3.162 fA places the

midpoint of the measurement range of 100 nA at V_LOG= 1.5 V.

Accurate 1.5 V (Pin 1P5V) and 2.0 V (Pin 2VLT) reference outputs

allow precise repositioning of the intercept using external resistors.

The ADL5304 is available in a 32-lead, 5 mm × 5 mm LFCSP

and specified for operation from −40°C to +85°C.

SIMPLIFIED BLOCK DIAGRAM

BSDC 2VLT VPOS

IMON

VNUM

INNM 1P5V

DCBI

INPS

1.5V

MONITOR AND

PD BIAS

INMS

BIAS AND

MNTR

100nA

VSM1

VSM2

(1.1× I

)

NUM

REF

VLOG

1.5V

ADL5304

INUM

SCL1

SCL2

NUM

LOG

5kΩ

7.5kΩ

5kΩ

IDEN

TEMPERATURE

COMPENSATION

IREF

VSM3

SCL3

DEN

ACOM

VSM4

1.5V

COMM NMFS VNEG DNFS ACOM HFCP

10 11

VDEN

INDN

1kΩ

NEG

Figure 1.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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