Datasheet > ADL5246-EVALZ

ADL5246-EVALZ

更新时间： 2022-02-26 13:55:02

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
36页	1452K
描述
3 GHz Variable Gain LNA with Integrated Â½ W Driver Amplifier

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ADL5246-EVALZ 数据手册

3 GHz Variable Gain LNA with Integrated

½ W Driver Amplifier

Data Sheet

ADL5246

FEATURES

GENERAL DESCRIPTION

RF output frequency range: 0.6 GHz to 3 GHz

Output IP3: 37 dBm at 2.2 GHz

Output P1dB: 28 dBm at 2.2 GHz

Noise figure of input amplifier: 1 dB at 2.2 GHz

Maximum gain: 31.5 dB at 2.2 GHz

Voltage variable attenuation range: 45 dB

0 V to 3.3 V attenuation control range

Integrated bypass switch for low noise VGA

Matched 50 Ω input stage

The ADL5246 is a high performance, low noise variable gain

amplifier (VGA) optimized for multistandard base station receivers

and point to point receive (Rx) and transmit (Tx) applications. The

low noise figure and excellent linearity performance allow the

device to be used in a variety of applications.

The device consists of a low noise amplifier, a high linearity

VGA, and a ½ W output driver stage. The variable attenuator

networks are optimized to provide high linearity performance

over the 45 dB gain control range. Gain is set using a unipolar

control voltage from 0 V to 3.3 V. The output stage of the ADL5246

is an externally tuned ½ W driver amplifier, which allows the

device to be optimized anywhere between the 0.6 GHz to 3 GHz

range, with an average tuning bandwidth of 200 MHz wide. An

external filter can be used between the VGA and the final driver

amplifier. The ADL5246 can be biased between 3.3 V and 5 V to

trade off between performance and power consumption.

3.3 V to 5 V single supply

32-lead, 5 mm × 5 mm LFCSP package

APPLICATIONS

Multistandard radio receivers

Point to point Rx and Tx

Instrumentation

Military and aerospace

The ADL5246 is fabricated on an advanced GaAs process. The

device is available in a 32-lead, RoHS compliant, 5 mm × 5 mm

LFCSP and thermally rated to operate over the −40°C to +105°C

temperature range.

FUNCTIONAL BLOCK DIAGRAM

11 28

RFOUT1

RFOUT3

AMP3

AMP1

VVA1

VVA2

RFIN1

AMP2

ADL5246

12 14 17

19 22

10 20 23 24 25 27 29

NIC

GND

Figure 1.

Rev. A

Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Technical Support

www.analog.com

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