ADF4355
Data Sheet
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
RF OUTPUT CHARACTERISTICS
VCO Frequency Range
RF Output Frequency
VCO Sensitivity
Frequency Pushing (Open-Loop)
Frequency Pulling (Open-Loop)
Harmonic Content
3400
53.125
6800
6800
MHz
MHz
MHz/V
MHz/V
MHz
Fundamental VCO range
KV
15
15
0.5
Voltage standing wave ratio (VSWR) = 2:1
Second
−27
−22
−20
−12
+8
+3
1
dBc
dBc
dBc
dBc
dBm
dBm
dB
Fundamental VCO output (RFOUTA+)
Divided VCO output (RFOUTA+)
Fundamental VCO output (RFOUTA+)
Divided VCO output (RFOUTA+)
RFOUTA+ = 1 GHz
RFOUTA+/RFOUTA− = 4.4 GHz
RFOUTA+/RFOUTA− = 4.4 GHz
RFOUTA+/RFOUTA− = 1 GHz to 4.4 GHz
Third
RF Output Power4
RF Output Power Variation
RF Output Power Variation (over
Frequency)
3
dB
Level of Signal with RF Output
Disabled
−60
−30
dBm
dBm
RFOUTA+/RFOUTA− = 1 GHz, VCO = 4 GHz
RFOUTA+/RFOUTA− = 4.4 GHz, VCO = 4.4 GHz
NOISE CHARACTERISTICS
Fundamental VCO Phase Noise
Performance
VCO noise in open-loop conditions
−116
−136
−138
−155
−113
−133
−135
−153
−110
−130
−132
−150
dBc/Hz 100 kHz offset from 3.4 GHz carrier
dBc/Hz 800 kHz offset from 3.4 GHz carrier
dBc/Hz 1 MHz offset from 3.4 GHz carrier
dBc/Hz 10 MHz offset from 3.4 GHz carrier
dBc/Hz 100 kHz offset from 5.0 GHz carrier
dBc/Hz 800 kHz offset from 5.0 GHz carrier
dBc/Hz 1 MHz offset from 5.0 GHz carrier
dBc/Hz 10 MHz offset from 5.0 GHz carrier
dBc/Hz 100 kHz offset from 6.8 GHz carrier
dBc/Hz 800 kHz offset from 6.8 GHz carrier
dBc/Hz 1 MHz offset from 6.8 GHz carrier
dBc/Hz 10 MHz offset from 6.8 GHz carrier
Normalized In-Band Phase Noise Floor
Fractional Channel5
−221
−223
−116
150
dBc/Hz
dBc/Hz
Integer Channel6
7
Normalized 1/f Noise, PN1_f
dBc/Hz 10 kHz offset; normalized to 1 GHz
fs
Integrated RMS Jitter
Spurious Signals due to Phase
−80
dBc
Frequency Detector (PFD) Frequency
1 VCP is the voltage at the CPOUT pin.
2 IOL is the output low current.
3 TA = 25°C; AVDD = DVDD = VRF = 3.3 V; VVCO = VP = 5.0 V; prescaler = 4/5; fREF = 122.88 MHz; fPFD = 61.44 MHz; and fRF = 1650 MHz.
IN
4 RF output power using the EV-ADF4355SD1Z evaluation board measured into a spectrum analyzer, with board and cable losses de-embedded. The EV-ADF4355SD1Z
RF outputs are pulled up externally using a 4.7 nH inductor. Unused RF output pins are terminated in 50 Ω.
5 Use this figure to calculate the phase noise for any application. To calculate in-band phase noise performance as seen at the VCO output, use the following formula:
−221 + 10log(fPFD) + 20logN. The value given is the lowest noise mode for the fractional channel.
6 Use this figure to calculate the phase noise for any application. To calculate in-band phase noise performance as seen at the VCO output, use the following formula:
−223 + 10log(fPFD) + 20logN. The value given is the lowest noise mode for the integer channel.
7 The PLL phase noise is composed of 1/f (flicker) noise plus the normalized PLL noise floor. The formula for calculating the 1/f noise contribution at an RF frequency (fRF)
and at a frequency offset (f) is given by PN = P1_f + 10log(10 kHz/f) + 20log(fRF/1 GHz). Both the normalized phase noise floor and flicker noise are modeled in the
ADIsimPLL design tool.
Rev. B | Page 4 of 35
5秒后页面跳转
STM32F030C6芯片介绍：主要参数分析、引脚配置说明、功耗及封装
PCF8591数据手册解读：参数、引脚说明
一文带你了解ss8050参数、引脚配置、应用指南
深入解析AD7606高性能多通道模数转换器：资料手册参数分析
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
