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ADF4355-3BCPZ-RL7 PDF预览

ADF4355-3BCPZ-RL7

更新时间: 2024-02-11 04:58:52
品牌 Logo 应用领域
亚德诺 - ADI 输入元件信息通信管理
页数 文件大小 规格书
35页 917K
描述
Microwave Wideband Synthesizer with Integrated VCO

ADF4355-3BCPZ-RL7 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active包装说明:HVQCCN,
针数:32Reach Compliance Code:compliant
风险等级:5.68其他特性:INPUT FREQUENCY IN SINGLE-ENDED MODE 250MHZ; WHEN DOUBLER ENABLED= 100MHZ
模拟集成电路 - 其他类型:PHASE LOCKED LOOPJESD-30 代码:S-XQCC-N32
JESD-609代码:e3长度:5 mm
湿度敏感等级:3功能数量:1
端子数量:32最高工作温度:105 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
座面最大高度:0.8 mm最大供电电压 (Vsup):3.4485 V
最小供电电压 (Vsup):3.1515 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:5 mmBase Number Matches:1

ADF4355-3BCPZ-RL7 数据手册

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Microwave Wideband Synthesizer  
with Integrated VCO  
Data Sheet  
ADF4355-3  
FEATURES  
GENERAL DESCRIPTION  
RF output frequency range: 51.5625 MHz to 6600 MHz  
Fractional-N synthesizer and integer-N synthesizer  
High resolution 38-bit modulus  
Low phase noise, voltage controlled oscillator (VCO)  
Programmable divide by 1, 2, 4, 8, 16, 32, or 64 output  
All power supplies: 3.3 V  
The ADF4355-3 allows the implementation of fractional-N or  
integer-N phase-locked loop (PLL) frequency synthesizers when  
used with an external loop filter and an external reference  
frequency. A series of frequency dividers at the output provide  
operation from 51.5625 MHz to 6600 MHz.  
The ADF4355-3 has an integrated VCO with a fundamental  
output frequency ranging from 3300 MHz to 6600 MHz. In  
addition, the VCO frequency is connected to divide by 1, 2, 4, 8,  
16, 32, or 64 circuits that allow the user to generate RF output  
frequencies as low as 51.5625 MHz. For applications that require  
isolation, the RF output stage can be muted. The mute function  
is both pin- and software-controllable.  
Logic compatibility: 1.8 V  
Programmable dual modulus prescaler of 4/5 or 8/9  
Programmable output power level  
RF output mute function  
3-wire serial interface  
Analog and digital lock detect  
APPLICATIONS  
Control of all on-chip registers is through a simple 3-wire interface.  
The ADF4355-3 operates with analog, digital, charge pump, and  
VCO power supplies ranging from 3.1515 V to 3.4485 V. The  
ADF4355-3 also contains hardware and software power-down  
modes.  
Wireless infrastructure (W-CDMA, TD-SCDMA,  
WiMAX, GSM, PCS, DCS, DECT)  
Point to point/point to multipoint microwave links  
Satellites/VSATs  
Test equipment/instrumentation  
Clock generation  
FUNCTIONAL BLOCK DIAGRAM  
AV  
DV  
V
R
V
VCO  
V
AV  
DD  
CE  
DD  
DD  
P
SET  
RF  
MULTIPLEXER  
MUXOUT  
10-BIT R  
COUNTER  
÷2  
DIVIDER  
REF  
REF  
A
B
IN  
×2  
DOUBLER  
LOCK  
DETECT  
IN  
C
C
1
2
REG  
REG  
CLK  
DATA  
LE  
DATA REGISTER  
FUNCTION  
LATCH  
CHARGE  
PUMP  
CP  
OUT  
PHASE  
COMPARATOR  
V
V
TUNE  
REF  
V
V
VCO  
CORE  
BIAS  
INTEGER  
REG  
FRACTION  
REG  
MODULUS  
REG  
REGVCO  
RF  
RF  
A+  
A–  
OUT  
OUT  
1/2/4/8  
16/32/64  
OUTPUT  
STAGE  
THIRD-ORDER  
÷
FRACTIONAL  
INTERPOLATOR  
PDB  
RF  
RF  
N COUNTER  
B+  
B–  
OUTPUT  
STAGE  
OUT  
RF  
OUT  
MULTIPLEXER  
SD  
ADF4355-3  
A
CP  
A
GNDVCO  
A
GND  
GND  
GND  
GNDRF  
Figure 1.  
Rev. B  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2015–2017 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 

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