Datasheet > ADF4217LBRUZ

ADF4217LBRUZ

更新时间： 2024-01-19 13:05:41

品牌	Logo	应用领域
亚德诺 - ADI		光电二极管
页数	文件大小	规格书
24页	273K
描述
IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, PDSO20, MO-153AC, TSSOP-20, PLL or Frequency Synthesis Circuit

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

ADF4217LBRUZ 数据手册

ADF4217L/ADF4218L/ADF4219L

BChips²

(Typical)

Parameter

B Version¹

Unit

Test Conditions/Comments

NOISE CHARACTERISTICS⁶

RF Phase Noise Floor⁷

–171

–163

–167

–159

–171

–163

–167

–159

dBc/Hz typ

@ 30 kHz PFD Frequency

@ 200 kHz PFD Frequency

@ 30 kHz PFD Frequency

@ 200 kHz PFD Frequency

@ VCO Output

1.95 GHz Output; 30 kHz PFD

900 MHz Output; 200 kHz PFD

900 MHz Output; 30 kHz PFD

900 MHz Output; 200 kHz PFD

Measured at Offset of f_PFD/2f_PFD

IF Phase Noise Floor⁷

Phase Noise Performance⁸

RF⁹

–75

–90

–77

–86

–75

–90

–77

–86

dBc/Hz typ

RF¹⁰

IF¹¹

IF¹²

Spurious Signals

RF⁹

RF¹⁰

IF¹¹

IF¹²

–78/–85

–80/–84

–79/–86

–80/–84

–78/–85

–80/–84

–79/–86

–80/–84

dBc typ

NOTES

¹Operating temperature range is as follows: B Version: –40°C to +85°C.

²The BChip specifications are given as typical values.

³This is the maximum operating frequency of the CMOS counters. The prescaler value should be chosen to ensure that the RF input is divided down to a frequency

that is less than this value.

⁴Guaranteed by design. Sample tested to ensure compliance.

⁵This includes relevant I_P.

⁶V_DD= 3 V; P = 16/32; IF_IN/RF_INfor ADF4218L, ADF4219L = 540 MHz/900 MHz.

⁷The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20logN (where N is the N divider value).

⁸The phase noise is measured with the EVAL-ADF421xEB1 Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the REFIN

for the synthesizer. (f_REFOUT= 10 MHz @ 0 dBm.)

⁹f_REFIN= 10 MHz; f_PFD= 30 kHz; Offset frequency = 1 kHz; f_RF= 1.95 GHz; N = 65000; Loop B/W = 3 kHz

= 10 MHz; f_PFD= 200 kHz; Offset frequency = 1 kHz; f_RF= 900 MHz; N = 4500; Loop B/W = 20 kHz

= 10 MHz; f_PFD= 30 kHz; Offset frequency = 1 kHz; f_IF= 900 MHz; N = 30000; Loop B/W = 3 kHz

= 10 MHz; f_PFD= 200 kHz; Offset frequency = 1 kHz; f_IF= 900 MHz; N = 4500; Loop B/W = 20 kHz

REFIN

Specifications subject to change without notice.

(V_DD1 = V_DD2 = 3 V ؎ 10%, 5 V ؎ 10%; V_DD1, V_DD2 ≤ V_P1,

TIMING CHARACTERISTICS

V_P2 ≤ 6.0 V ; AGND_RF1= DGND_RF1= AGND_RF2= DGND_RF2= 0 V; T_A= T_MINto T_MAX, unless otherwise noted.)

Limit at

T_MINto T_MAX

(B Version)

Parameter

Unit

Test Conditions/Comments

t₁

t₂

t₃

t₄

t₅

t₆

ns min

DATA to CLOCK Setup Time

DATA to CLOCK Hold Time

CLOCK High Duration

CLOCK Low Duration

CLOCK to LE Setup Time

LE Pulsewidth

Guaranteed by design but not production tested.

t₃

t₄

CLOCK

t₁

t₂

DB1

(CONTROL BIT C2)

DB0 (LSB)

(CONTROL BIT C1)

DATA

DB21 (MSB)

DB20

DB2

t₆

t₅

Figure 1. Timing Diagram

–3–

REV. C

1 234 5 6 7...24

下载PDF

与ADF4217LBRUZ相关器件

型号	品牌	描述	获取价格	数据表
ADF4217LBRUZ-RL	ADI	暂无描述	获取价格
ADF4217LBRUZ-RL7	ADI	IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, PDSO20, MO-153AC, TSSOP-20, PLL or Frequency Synth	获取价格
ADF4218	ADI	Dual RF PLL Frequency Synthesizers	获取价格
ADF4218BCHIPS	ADI	IC PLL FREQUENCY SYNTHESIZER, 2500 MHz, UUC, DIE, PLL or Frequency Synthesis Circuit	获取价格
ADF4218BRU	ADI	Dual RF PLL Frequency Synthesizers	获取价格
ADF4218BRU-REEL	ADI	IC PLL FREQUENCY SYNTHESIZER, 2500 MHz, PDSO20, TSSOP-20, PLL or Frequency Synthesis Circu	获取价格

与ADF4217LBRUZ相关文章

VIPER22A的资料手册解读、引脚参数说明、代换型号推荐
2024-05-14

3
ADS1256的资料手册解读、采集电压范围、读数变化原因分析及实际测量遇到的问题
2024-05-14

6
MAX6675资料手册参数详解、引脚配置说明
2024-05-13

12
LM258引脚图及功能介绍、主要参数分析
2024-05-13

11

产品中心

服务支持

精选活动

关于我们

帮助中心

ADF4217LBRUZ

ADF4217LBRUZ 数据手册

与ADF4217LBRUZ相关器件

与ADF4217LBRUZ相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

ADF4217LBRUZ

ADF4217LBRUZ 数据手册

与ADF4217LBRUZ相关器件

与ADF4217LBRUZ相关文章

您还可以找

您在本页遇到什么问题？