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ADE7166ACPZF16-RL1 PDF预览

ADE7166ACPZF16-RL1

更新时间： 2022-04-23 23:00:11
品牌 Logo 应用领域
亚德诺 - ADI 驱动器
页数 文件大小 规格书
148页 1687K
描述
Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver

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ADE7166ACPZF16-RL1 数据手册

 浏览型号ADE7166ACPZF16-RL1的Datasheet PDF文件第140页浏览型号ADE7166ACPZF16-RL1的Datasheet PDF文件第141页浏览型号ADE7166ACPZF16-RL1的Datasheet PDF文件第142页浏览型号ADE7166ACPZF16-RL1的Datasheet PDF文件第144页浏览型号ADE7166ACPZF16-RL1的Datasheet PDF文件第145页浏览型号ADE7166ACPZF16-RL1的Datasheet PDF文件第146页 
Preliminary Technical Data  
ADE75xx/ADE71xx  
Table 144. Port 0 SFR (P0, 0x80)  
Note: When an alternate function is chosen for a pin of this port, the bit controlling this pin should always be set  
Bit Location Bit  
Addr.  
Bit  
Name  
Default  
Value  
Description  
7
6
5
4
3
2
1
0
0x87  
0x86  
0x85  
0x84  
0x83  
0x82  
0x81  
0x80  
T1  
T0  
1
1
1
1
1
1
1
1
This bit reflects the state of P0.7/SS/T1 pin. It can be written or read.  
This bit reflects the state of P0.6/SCLK/T0 pin. It can be written or read.  
This bit reflects the state of P0.5/MISO pin. It can be written or read.  
This bit reflects the state of P0.4/MOSI/SDATA pin. It can be written or read.  
This bit reflects the state of P0.3/CF2 pin. It can be written or read.  
This bit reflects the state of P0.2/CF1/RTCCAL pin. It can be written or read.  
This bit reflects the state of P0.1 pin. It can be written or read.  
CF2  
CF1  
INT1  
This bit reflects the state of P0.0/INT1/BCTRL pin. It can be written or read.  
Table 14ꢀ. Port 1 SFR (P1, 0x90)  
Note: When an alternate function is chosen for a pin of this port, the bit controlling this pin should always be set  
Bit Location Bit  
Addr.  
Bit  
Name  
Default Description  
value  
7
6
5
4
3
2
1
0
0x97  
0x96  
0x95  
0x94  
0x93  
0x92  
0x91  
0x90  
1
1
1
1
1
1
1
1
This bit reflects the state of P1.7 pin. It can be written or read.  
This bit reflects the state of P1.6 pin. It can be written or read.  
This bit reflects the state of P1.5 pin. It can be written or read.  
This bit reflects the state of P1.4/T2 pin. It can be written or read.  
This bit reflects the state of P1.3/T2EX pin. It can be written or read.  
This bit reflects the state of P1.2 pin. It can be written or read.  
This bit reflects the state of P1.1/TxD pin. It can be written or read.  
This bit reflects the state of P1.0/RxD pin. It can be written or read.  
T2  
T2EX  
TxD  
RxD  
Table 146. Port 2 SFR (P2, 0xA0)  
Note: When an alternate function is chosen for a pin of this port, the bit controlling this pin should always be set  
Bit Location Bit  
Addr.  
Bit  
Name  
Default Description  
Value  
7 - 2  
0x97 –  
0x92  
0x3F  
These bits are unused and should be left set  
1
0
0x91  
0x90  
P2.1  
P2.0  
1
1
This bit reflects the state of P2.1 pin. It can be written or read.  
This bit reflects the state of P2.0 pin. It can be written or read.  
Interrupt pins configuration SFR (INTPR, 0xFF)  
Bit  
Bit  
Default  
Value  
0
Description  
Location Mnemonic  
7
RTCCAL  
Control RTC calibration output  
When set, the RTC calibration frequency selected by FSEL[1:0] is  
output on the P0.2/CF1/RTCCAL pin.  
6-5  
FSEL[1:0]  
Sets RTC calibration output frequency and calibration window  
FSEL[1:0]  
Calibration window, frequency  
30.5 seconds, 1Hz  
0
0
1
1
0
1
0
1
30.5 seconds, 512 Hz  
0.244 seconds, 500Hz  
0.244 seconds, 16.384 kHz  
4
Reserved  
3-1  
INT1PRG[2:0]  
000  
Controls the function of INT1T  
INT1PRG[2:0] Function  
Rev. PrE | Page 143 of 148  
 
1...140141142143144145146...148

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