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ADC3563IRSBR PDF预览

ADC3563IRSBR

更新时间: 2022-05-14 22:22:02
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德州仪器 - TI /
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74页 5014K
描述
ADC356x 16-Bit, 0.5-MSPS to 65-MSPS, Low-Noise, Low Power ADC

ADC3563IRSBR 数据手册

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ADC3563  
SBAS990 – FEBRUARY 2021  
www.ti.com  
5 Pin Configuration and Functions  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
1
2
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
PDN/SYNC  
VREF  
IOVDD  
FCLKM  
FCLKP  
3
REFGND  
REFBUF  
AVDD  
CLKP  
4
NC  
5
IOGND  
DCLKINP  
DCLKINM  
DCLKP  
DCLKM  
IOVDD  
6
7
CLKM  
8
VCM  
9
RESET  
SDIO  
GND PAD (backside)  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
Figure 5-1. RSB Package, 40-Pin WQFN, Top View  
Table 5-1. Pin Descriptions  
PIN  
I/O  
DESCRIPTION  
NAME  
NO.  
INPUT/REFERENCE  
AINP  
12  
13  
8
I
I
Positive analog input  
Negative analog input  
AINM  
VCM  
O
I
Common-mode voltage output for the analog inputs, 0.95 V  
External voltage reference input, 1.6 V  
VREF  
2
REFBUF  
REFGND  
CLOCK  
4
I
1.2V external voltage reference input for use with internal reference buffer  
Reference ground input  
3
I
CLKM  
7
6
I
I
Negative differential sampling clock input for the ADC  
Positive differential sampling clock input for the ADC  
CLKP  
CONFIGURATION  
Power down/Synchronization input. This pin can be configured via the SPI interface. Active  
high. This pin has an internal 21 kΩ pull-down resistor.  
PDN/SYNC  
1
I
RESET  
SEN  
9
I
I
I
I
Hardware reset. Active high. This pin has an internal 21 kΩ pull-down resistor.  
Serial interface enable. Active low. This pin has an internal 21 kΩ pull-up resistor to AVDD.  
Serial interface clock input. This pin has an internal 21 kΩ pull-down resistor.  
Serial interface data input and output. This pin has an internal 21 kΩ pull-down resistor.  
16  
35  
10  
SCLK  
SDIO  
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