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ADC104S101CIMM/NOPB

更新时间： 2024-01-26 16:44:53
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德州仪器 - TI 转换器
页数 文件大小 规格书
27页 1370K
描述
ADC104S101 4 Channel, 500 ksps to 1 Msps, 10-Bit A/D Converter

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ADC104S101CIMM/NOPB 技术参数

是否Rohs认证：符合生命周期：Obsolete
零件包装代码：SSOP包装说明：GREEN, PLASTIC, VSSOP-10
针数：10Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
Factory Lead Time：6 weeks风险等级：5.35
Is Samacsys：N最大模拟输入电压：5.25 V
最小模拟输入电压：最长转换时间：1.625 µs
转换器类型：ADC, SUCCESSIVE APPROXIMATIONJESD-30 代码：S-PDSO-G10
JESD-609代码：e3长度：3 mm
最大线性误差 (EL)：0.0684%湿度敏感等级：1
模拟输入通道数量：4位数：10
功能数量：1端子数量：10
最高工作温度：85 °C最低工作温度：-40 °C
输出位码：BINARY输出格式：SERIAL
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP10,.19,20封装形状：SQUARE
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
电源：3/5 V认证状态：Not Qualified
采样速率：1 MHz采样并保持/跟踪并保持：TRACK
座面最大高度：1.1 mm子类别：Analog to Digital Converters
标称供电电压：3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：3 mm
Base Number Matches：1

ADC104S101CIMM/NOPB 数据手册

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ADC104S101  
SNAS284F –FEBRUARY 2005–REVISED MARCH 2013  
www.ti.com  
Specification Definitions  
ACQUISITION TIME is the time required to acquire the input voltage. That is, it is time required for the hold  
capacitor to charge up to the input voltage.  
APERTURE DELAY is the time between the fourth falling SCLK edge of a conversion and the time when the  
input signal is acquired or held for conversion.  
CONVERSION TIME is the time required, after the input voltage is acquired, for the ADC to convert the input  
voltage to a digital word.  
CROSSTALK is the coupling of energy from one channel into the other channel, or the amount of signal energy  
from one analog input that appears at the measured analog input.  
DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1  
LSB.  
DUTY CYCLE is the ratio of the time that a repetitive digital waveform is high to the total time of one period. The  
specification here refers to the SCLK.  
EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE BITS) is another method of specifying Signal-to-Noise  
and Distortion or SINAD. ENOB is defined as (SINAD − 1.76) / 6.02 and says that the converter is equivalent to  
a perfect ADC of this (ENOB) number of bits.  
FULL POWER BANDWIDTH is a measure of the frequency at which the reconstructed output fundamental  
drops 3 dB below its low frequency value for a full scale input.  
FULL SCALE ERROR (FSE) is a measure of how far the last code transition is from the ideal 1½ LSB below  
+
VREF and is defined as:  
+
VFSE = Vmax + 1.5 LSB – VREF  
where  
•
Vmax is the voltage at which the transition to the maximum code occurs. FSE can be expressed in Volts, LSB  
or percent of full scale range. (1)  
GAIN ERROR is the deviation of the last code transition (111...110) to (111...111) from the ideal (VREF − 1.5  
LSB), after adjusting for offset error.  
INTEGRAL NON-LINEARITY (INL) is a measure of the deviation of each individual code from a line drawn from  
negative full scale (½ LSB below the first code transition) through positive full scale (½ LSB above the last code  
transition). The deviation of any given code from this straight line is measured from the center of that code value.  
INTERMODULATION DISTORTION (IMD) is the creation of additional spectral components as a result of two  
sinusoidal frequencies being applied to the ADC input at the same time. It is defined as the ratio of the power in  
the second and third order intermodulation products to the power in one of the original frequencies. IMD is  
usually expressed in dB.  
MISSING CODES are those output codes that will never appear at the ADC outputs. These codes cannot be  
reached with any input value. The ADC104S101 is specified not to have any missing codes.  
OFFSET ERROR is the deviation of the first code transition (000...000) to (000...001) from the ideal (i.e. GND +  
0.5 LSB).  
SIGNAL TO NOISE RATIO (SNR) is the ratio, expressed in dB, of the rms value of the input signal to the rms  
value of the sum of all other spectral components below one-half the sampling frequency, not including d.c. or  
the harmonics included in THD.  
SIGNAL TO NOISE PLUS DISTORTION (S/N+D or SINAD) Is the ratio, expressed in dB, of the rms value of the  
input signal to the rms value of all of the other spectral components below half the clock frequency, including  
harmonics but excluding d.c.  
SPURIOUS FREE DYNAMIC RANGE (SFDR) is the difference, expressed in dB, between the rms values of the  
input signal and the peak spurious signal where a spurious signal is any signal present in the output spectrum  
that is not present at the input, excluding d.c.  
8
Submit Documentation Feedback  
Copyright © 2005–2013, Texas Instruments Incorporated  
Product Folder Links: ADC104S101  
1...567891011...27

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ADC104S101CIMM/NOPB 替代型号

型号 品牌 替代类型 描述 数据表
ADC104S021CIMM/NOPB TI

类似代替

 具有单端输入和串行接口的 10 位、200kSPS、4 通道 SAR ADC | DGS
ADC104S101CIMM TI

完全替代

 ADC104S101 4 Channel, 500 ksps to 1 Msps, 10-Bit A/D Converter

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