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ADC104S101CIMM PDF预览

ADC104S101CIMM

更新时间： 2024-01-31 18:46:27
品牌 Logo 应用领域
德州仪器 - TI 转换器
页数 文件大小 规格书
27页 1370K
描述
ADC104S101 4 Channel, 500 ksps to 1 Msps, 10-Bit A/D Converter

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ADC104S101CIMM 技术参数

是否Rohs认证：符合生命周期：Obsolete
零件包装代码：SSOP包装说明：GREEN, PLASTIC, VSSOP-10
针数：10Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
Factory Lead Time：6 weeks风险等级：5.35
Is Samacsys：N最大模拟输入电压：5.25 V
最小模拟输入电压：最长转换时间：1.625 µs
转换器类型：ADC, SUCCESSIVE APPROXIMATIONJESD-30 代码：S-PDSO-G10
JESD-609代码：e3长度：3 mm
最大线性误差 (EL)：0.0684%湿度敏感等级：1
模拟输入通道数量：4位数：10
功能数量：1端子数量：10
最高工作温度：85 °C最低工作温度：-40 °C
输出位码：BINARY输出格式：SERIAL
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP10,.19,20封装形状：SQUARE
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
电源：3/5 V认证状态：Not Qualified
采样速率：1 MHz采样并保持/跟踪并保持：TRACK
座面最大高度：1.1 mm子类别：Analog to Digital Converters
标称供电电压：3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：3 mm
Base Number Matches：1

ADC104S101CIMM 数据手册

 浏览型号ADC104S101CIMM的Datasheet PDF文件第18页浏览型号ADC104S101CIMM的Datasheet PDF文件第19页浏览型号ADC104S101CIMM的Datasheet PDF文件第20页浏览型号ADC104S101CIMM的Datasheet PDF文件第22页浏览型号ADC104S101CIMM的Datasheet PDF文件第23页浏览型号ADC104S101CIMM的Datasheet PDF文件第24页 
ADC104S101  
www.ti.com  
SNAS284F –FEBRUARY 2005–REVISED MARCH 2013  
Power Management  
When the ADC104S101 is operated continuously in normal mode, the maximum throughput is fSCLK/16.  
Throughput may be traded for power consumption by running fSCLK at its maximum 16 MHz and performing fewer  
conversions per unit time, putting the ADC104S101 into shutdown mode between conversions. A plot of typical  
power consumption versus throughput is shown in the Typical Performance Characteristics section. To calculate  
the power consumption for a given throughput, multiply the fraction of time spent in the normal mode by the  
normal mode power consumption and add the fraction of time spent in shutdown mode multiplied by the  
shutdown mode power consumption. Generally, the user will put the part into normal mode and then put the part  
back into shutdown mode. Note that the curve of power consumption vs. throughput is nearly linear. This is  
because the power consumption in the shutdown mode is so small that it can be ignored for all practical  
purposes.  
Power Supply Noise Considerations  
The charging of any output load capacitance requires current from the power supply, VA. The current pulses  
required from the supply to charge the output capacitance will cause voltage variations on the supply. If these  
variations are large enough, they could degrade SNR and SINAD performance of the ADC. Furthermore,  
discharging the output capacitance when the digital output goes from a logic high to a logic low will dump current  
into the die substrate, which is resistive. Load discharge currents will cause "ground bounce" noise in the  
substrate that will degrade noise performance if that current is large enough. The larger is the output  
capacitance, the more current flows through the die substrate and the greater is the noise coupled into the  
analog channel, degrading noise performance.  
To keep noise out of the power supply, keep the output load capacitance as small as practical. If the load  
capacitance is greater than 50 pF, use a 100 Ω series resistor at the ADC output, located as close to the ADC  
output pin as practical. This will limit the charge and discharge current of the output capacitance and improve  
noise performance.  
Copyright © 2005–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
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Product Folder Links: ADC104S101  
 
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