ADC104S021EVAL

更新时间： 2024-02-28 14:01:00

品牌	Logo	应用领域
美国国家半导体 - NSC		转换器
页数	文件大小	规格书
19页	918K
描述
4 Channel, 200 kSPS, 10-Bit A/D Converter

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中文翻译

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技术参数
数据手册

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ADC104S021EVAL 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.72	转换器类型：	ADC, SUCCESSIVE APPROXIMATION
输出位码：	OFFSET BINARY	Base Number Matches：	1

ADC104S021EVAL 数据手册

There are no power-up delays or dummy conversions re-

quired with the ADC104S021. The ADC is able to sample

and convert an input to full conversion immediately following

power up. The first conversion result after power-up will be

that of IN1.

Applications Information (Continued)

conversion, it is necessary to clock in the data indicating the

input that is selected for the conversion after the current one.

See Tables 1, 2 and Table 3.

If CS and SCLK go low simultaneously, it is the following

rising edge of SCLK that is considered the first rising edge

for clocking data into DIN.

TABLE 1. Control Register Bits

Bit 4 Bit 3

ADD1 ADD0

Bit 7 (MSB)

Bit 6

Bit 5

Bit 2

Bit 1

Bit 0

DONTC

ADD2

DONTC

TABLE 2. Control Register Bit Descriptions

Description

Bit #:

Symbol:

7 - 6, 2 - 0

DONTC

Don’t care. The value of these bits do not affect device operation.

These three bits determine which input channel will be sampled and

converted in the next track/hold cycle. The mapping between codes and

channels is shown in Table 3.

ADD2

ADD1

ADD0

TABLE 3. Input Channel Selection

ADD2

ADD1

ADD0

Input Channel

IN1 (Default)

IN2

IN3

IN4

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