ADC08831, ADC08832
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SNAS015C –SEPTEMBER 1999–REVISED MARCH 2013
Electrical Characteristics
The following specifications apply for VCC = VREF = +5VDC, and fCLK = 2 MHz unless otherwise specified. Boldface limits
apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25°C.
Symbol
Parameter
Conditions
Typical(1)
Limits(2)
Units (Limits)
CONVERTER AND MULTIPLEXER CHARACTERISTICS
TUE
Total Unadjusted Error
See(3)
±0.3
±1
LSB
(max)
Offset Error
±0.2
±0.2
±0.2
±0.3
3.5
LSB
LSB
LSB
LSB
DNL
INL
Differential NonLinearity
Integral NonLinearity
Full Scale Error
FS
RREF
Reference Input Resistance
See(4)
See(5)
2.8
5.9
kΩ (min)
kΩ (max)
VIN
Analog Input Voltage
(VCC + 0.05)
(GND − 0.05)
V (max)
V (min)
DC Common-Mode Error
Power Supply Sensitivity
±¼
LSB (max)
VCC = 5V ±10%,
VCC = 5V ±5%
±¼
±¼
LSB (max)
LSB (max)
On Channel Leakage Current(6)
On Channel = 5V,
Off Channel = 0V
0.2
1
μA (max)
μA (min)
μA (min)
μA (max)
On Channel = 0V
Off Channel = 5V
−0.2
−1
Off Channel Leakage Current(7)
On Channel = 5V, Off
Channel = 0V
−0.2
−1
On Channel = 0V,
Off Channel = 5V
0.2
1
DC CHARACTERISTICS
VIN(1)
VIN(0)
IIN(1)
Logical “1” Input Voltage
2.0
0.8
+1
V (min)
V (max)
μA (max)
μA (max)
Logical “0” Input Voltage
Logical “1” Input Current
Logical “0” Input Current
Logical “1” Output Voltage
VIN = 5.0V
0.05
0.05
IIN(0)
VIN = 0V
−1
VOUT(1)
VCC = 4.75V:
IOUT = −360 μA
IOUT = −10 μA
2.4
4.5
0.4
V (min)
V (min)
V (max)
VOUT(0)
Logical “0” Output Voltage
VCC = 4.75V
IOUT = 1.6 mA
(1) Typicals are at TJ = 25°C and represent the most likely parametric norm.
(2) Specified to TI's AOQL (Average Outgoing Quality Level).
(3) Total Unadjusted Error (TUE) includes offset, full-scale, linearity, multiplexer errors.
(4) It is not tested for the ADC08832.
(5) For VIN(−) ≥ VIN(+) the digital code will be 0000 0000. Two on-chip diodes are tied to each analog input (see ADC08832 Functional Block
Diagram) which will forward-conduct for analog input voltages one diode drop below ground or one diode drop greater than VCC supply.
During testing at low VCC levels (e.g., 4.5V), high level analog inputs (e.g., 5V) can cause an input diode to conduct, especially at
elevated temperatures, which will cause errors for analog inputs near full-scale. The spec allows 50 mV forward bias of either diode; this
means that as long as the analog VIN does not exceed the supply voltage by more than 50 mV, the output code will be correct.
Exceeding this range on an unselected channel will corrupt the reading of a selected channel. Achievement of an absolute 0 VDC to 5
VDC input voltage range will therefore require a minimum supply voltage of 4.950 VDC over temperature variations, initial tolerance and
loading.
(6) Channel leakage current is measured after a single-ended channel is selected and the clock is turned off. For off channel leakage
current the following two cases are considered: one, with the selected channel tied high (5 VDC) and the remaining off channel tied low
(0 VDC), total current flow through the off channel is measured; two, with the selected channel tied low and the off channels tied high,
total current flow through the off channel is again measured. The two cases considered for determining on channel leakage current are
the same except total current flow through the selected channel is measured.
(7) Channel leakage current is measured after a single-ended channel is selected and the clock is turned off. For off channel leakage
current the following two cases are considered: one, with the selected channel tied high (5 VDC) and the remaining off channel tied low
(0 VDC), total current flow through the off channel is measured; two, with the selected channel tied low and the off channels tied high,
total current flow through the off channel is again measured. The two cases considered for determining on channel leakage current are
the same except total current flow through the selected channel is measured.
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