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ADA4805-1AKSZ-R2

更新时间： 2024-02-02 14:29:51
品牌 Logo 应用领域
亚德诺 - ADI 放大器光电二极管
页数 文件大小 规格书
25页 830K
描述
0.2 µV/°C Offset Drift, 105 MHz Low Power, Low Noise, Rail-to-Rail Amplifier

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中文翻译

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ADA4805-1AKSZ-R2 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active包装说明：ROHS COMPLIANT, PLASTIC, MO-203AB, SC-70, 6 PIN
针数：6Reach Compliance Code：compliant
风险等级：1.72放大器类型：OPERATIONAL AMPLIFIER
最大平均偏置电流 (IIB)：0.8 µA标称共模抑制比：130 dB
最大输入失调电压：125 µVJESD-30 代码：R-PDSO-G6
JESD-609代码：e3长度：2 mm
湿度敏感等级：1负供电电压上限：-5.5 V
标称负供电电压 (Vsup)：-5 V功能数量：1
端子数量：6最高工作温度：125 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
座面最大高度：1.1 mm标称压摆率：250 V/us
子类别：Operational Amplifier供电电压上限：5.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：BIPOLAR温度等级：AUTOMOTIVE
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：1.25 mm
Base Number Matches：1

ADA4805-1AKSZ-R2 数据手册

 浏览型号ADA4805-1AKSZ-R2的Datasheet PDF文件第19页浏览型号ADA4805-1AKSZ-R2的Datasheet PDF文件第20页浏览型号ADA4805-1AKSZ-R2的Datasheet PDF文件第21页浏览型号ADA4805-1AKSZ-R2的Datasheet PDF文件第22页浏览型号ADA4805-1AKSZ-R2的Datasheet PDF文件第24页浏览型号ADA4805-1AKSZ-R2的Datasheet PDF文件第25页 
Data Sheet  
ADA4805-1/ADA4805-2  
SINGLE-ENDED TO DIFFERENTIAL CONVERSION  
LAYOUT CONSIDERATIONS  
Most high resolution ADCs have differential inputs to reduce  
common-mode noise and harmonic distortion. Therefore, it is  
necessary to use an amplifier to convert a single-ended signal  
into a differential signal to drive the ADCs.  
To ensure optimal performance, careful and deliberate attention  
must be paid to the board layout, signal routing, power supply  
bypassing, and grounding.  
Ground Plane  
There are two common ways the user can convert a single-ended  
signal into a differential signal: either use a differential  
It is important to avoid ground in the areas under and around the  
input and output of the ADA4805-1/ADA4805-2. Stray capacitance  
between the ground plane and the input and output pads of a  
device is detrimental to high speed amplifier performance.  
Stray capacitance at the inverting input, together with the  
amplifier input capacitance, lowers the phase margin and can  
cause instability. Stray capacitance at the output creates a pole in  
the feedback loop, which can reduce phase margin and cause  
the circuit to become unstable.  
amplifier, or configure two amplifiers as shown in Figure 64.  
The use of a differential amplifier yields better performance,  
whereas the 2-op-amp solution results in lower system cost. The  
ADA4805-1/ADA4805-2 solve this dilemma of choosing between  
the two methods by combining the advantages of both. Their  
low harmonic distortion, low offset voltage, and low bias current  
mean that they can produce a differential output that is well  
matched with the performance of the high resolution ADCs.  
Power Supply Bypassing  
Figure 64 shows how the ADA4805-1/ADA4805-2 convert a  
single-ended signal into a differential output. The first amplifier  
is configured in a gain = +1 with its output then inverted to  
produce the complementary signal. The differential output then  
drives the AD7982, an 18-bit, 1 MSPS SAR ADC. To further  
reduce noise, the user can reduce the values of R1 and R2.  
However, note that this increases the power consumption. The  
low-pass filter of the ADC driver limits the noise to the ADC.  
Power supply bypassing is a critical aspect in the performance  
of the ADA4805-1/ADA4805-2. A parallel connection of  
capacitors from each power supply pin to ground works best.  
Smaller value ceramic capacitors offer better high frequency  
response, whereas larger value ceramic capacitors offer better  
low frequency performance.  
Paralleling different values and sizes of capacitors helps to ensure  
that the power supply pins are provided with a low ac impedance  
across a wide band of frequencies. This is important for minimizing  
the coupling of noise into the amplifier—especially when the  
amplifier PSRR begins to roll off—because the bypass capacitors  
can help lessen the degradation in PSRR performance.  
The measured SNR, THD, and SINAD of the whole system for a  
10 kHz signal are 93 dB, 113 dBc, and 93 dB, respectively. This  
translates to an ENOB of 15.1 at 10 kHz, which is compatible  
with the performance of the AD7982. Table 11 shows the  
performance of this setup at selected input frequencies.  
Place the smallest value capacitor on the same side of the board  
as the amplifier and as close as possible to the amplifier power  
supply pins. Connect the ground end of the capacitor directly to  
the ground plane.  
Table 11. System Performance at Selected Input Frequency  
for Driving the AD7982 Differentially  
Results  
Input Frequency  
(kHz)  
SNR  
(dB)  
THD  
(dBc)  
SINAD  
(dB)  
It is recommended that a 0.1 μF ceramic capacitor with a  
0508 case size be used. The 0508 case size offers low series  
inductance and excellent high frequency performance. Place a  
10 μF electrolytic capacitor in parallel with the 0.1 μF capacitor.  
Depending on the circuit parameters, some enhancement to  
performance can be realized by adding additional capacitors.  
Each circuit is different and must be analyzed individually for  
optimal performance.  
ENOB  
15.1  
15.1  
15.1  
14.8  
14.3  
1
93  
93  
93  
92  
89  
104  
113  
110  
102  
96  
93  
93  
93  
91  
88  
10  
20  
50  
100  
VDD  
C4  
0.1µF  
R3  
22ꢀ  
+5V  
R2  
1kꢀ  
C2  
2.7nF  
+7.5V  
REF VDD  
IN+  
AD7982  
IN–  
+7.5V  
R1  
1kꢀ  
R4  
22ꢀ  
ADA4805-1/  
ADA4805-2  
C3  
2.7nF  
ADA4805-1/  
ADA4805-2  
V
C1  
0.1µF  
IN  
+2.5V  
+2.5V  
Figure 64. Driving the AD7982 with the ADA4805-1/ADA4805-2  
Rev. B | Page 23 of 25  
 
 
 
 
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ADA4805-1AKSZ-R2 替代型号

型号 品牌 替代类型 描述 数据表
ADA4805-1ARJZ-R7 ADI

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 		0.2 µV/°C Offset Drift, 105 MHz Low Power, Low Noise, Rail-to-Rail Amplif
ADA4805-1AKSZ-R7 ADI

功能相似

 		0.2 µV/°C Offset Drift, 105 MHz Low Power, Low Noise, Rail-to-Rail Amplif

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