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ADA4304-4ACPZ-RL PDF预览

ADA4304-4ACPZ-RL

更新时间: 2022-02-26 11:45:11
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
11页 217K
描述
1:3 and 1:4 Single-Ended, Low Cost Active RF Splitters

ADA4304-4ACPZ-RL 数据手册

 浏览型号ADA4304-4ACPZ-RL的Datasheet PDF文件第1页浏览型号ADA4304-4ACPZ-RL的Datasheet PDF文件第2页浏览型号ADA4304-4ACPZ-RL的Datasheet PDF文件第3页浏览型号ADA4304-4ACPZ-RL的Datasheet PDF文件第5页浏览型号ADA4304-4ACPZ-RL的Datasheet PDF文件第6页浏览型号ADA4304-4ACPZ-RL的Datasheet PDF文件第7页 
ADA4304-3/ADA4304-4  
Data Sheet  
ABSOLUTE MAXIMUM RATINGS  
The power dissipated in the package (PD) is essentially equal to  
Table 2.  
the quiescent power dissipation, that is, the supply voltage (VS)  
times the quiescent current (IS). In Table 1, the maximum  
power dissipation of the ADA4304-3/ADA4304-4 can be  
calculated as  
Parameter  
Rating  
Supply Voltage  
5.5 V  
Power Dissipation  
See Figure 3  
−65°C to +125°C  
−40°C to +85°C  
300°C  
Storage Temperature Range  
Operating Temperature Range  
Lead Temperature (Soldering, 10 sec)  
Junction Temperature  
P
D (MAX) = 5.25 V × 105 mA = 551 mW  
Airflow increases heat dissipation, effectively reducing θJA.  
In addition, more metal directly in contact with the package  
leads/exposed pad from metal traces, through-holes, ground,  
and power planes reduces the θJA.  
150°C  
Stresses at or above those listed under Absolute Maximum  
Ratings may cause permanent damage to the product. This  
is a stress rating only; functional operation of the product  
at these or any other conditions above those indicated in  
the operational section of this specification is not implied.  
Operation beyond the maximum operating conditions for  
extended periods may affect product reliability.  
Figure 3 shows the maximum safe power dissipation in the  
package vs. the ambient temperature for the 16-lead LFCSP  
(98°C/W) on a JEDEC standard 4-layer board.  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
THERMAL RESISTANCE  
θJA is specified for the device (including exposed pad)  
soldered to a high thermal conductivity 4-layer (2s2p)  
circuit board, as described in EIA/JESD 51-7.  
Table 3. Thermal Resistance  
Package Type  
θJA  
Unit  
16-Lead LFCSP (Exposed Pad)  
98  
°C/W  
Maximum Power Dissipation  
0
10  
20  
30  
40  
50  
60  
70  
80  
90  
100  
The maximum safe power dissipation in the ADA4304-3/  
ADA4304-4 package is limited by the associated rise in  
junction temperature (TJ) on the die. At approximately  
150°C, which is the glass transition temperature, the plastic  
changes its properties. Even temporarily exceeding this  
temperature limit can change the stresses that the package  
exerts on the die, permanently shifting the parametric  
performance. Exceeding a junction temperature of 150°C  
for an extended period can result in changes in the silicon  
devices, potentially causing failure.  
AMBIENT TEMPERATURE (°C)  
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board  
ESD CAUTION  
Rev. A | Page 4 of 11  
 
 
 
 

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