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AD9925BBCZRL PDF预览

AD9925BBCZRL

更新时间： 2024-02-22 03:32:30
品牌 Logo 应用领域
亚德诺 - ADI 驱动器消费电路商用集成电路
页数 文件大小 规格书
96页 1940K
描述
CCD Signal Processor with Vertical Driver and Precision Timing Generator

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中文翻译

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AD9925BBCZRL 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：BGA
包装说明：8 X 8 MM, 0.65 MM PITCH, LEAD FREE, PLASTIC, CSBGA-96针数：96
Reach Compliance Code：unknown风险等级：5.65
Is Samacsys：N商用集成电路类型：CONSUMER CIRCUIT
JESD-30 代码：S-PBGA-B96JESD-609代码：e3
长度：8 mm湿度敏感等级：NOT SPECIFIED
功能数量：1端子数量：96
最高工作温度：85 °C最低工作温度：-25 °C
封装主体材料：PLASTIC/EPOXY封装代码：LFBGA
封装形状：SQUARE封装形式：GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：260认证状态：COMMERCIAL
座面最大高度：1.4 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.7 V表面贴装：YES
温度等级：OTHER端子面层：MATTE TIN
端子形式：BALL端子节距：0.65 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：40
宽度：8 mmBase Number Matches：1

AD9925BBCZRL 数据手册

 浏览型号AD9925BBCZRL的Datasheet PDF文件第87页浏览型号AD9925BBCZRL的Datasheet PDF文件第88页浏览型号AD9925BBCZRL的Datasheet PDF文件第89页浏览型号AD9925BBCZRL的Datasheet PDF文件第91页浏览型号AD9925BBCZRL的Datasheet PDF文件第92页浏览型号AD9925BBCZRL的Datasheet PDF文件第93页 
AD9925  
Table 82. XV7 and XV8 Pattern Group 8 (VPAT8) Registers  
Address  
Data Bit Content  
Default Value  
Register Name  
Register Description  
40  
[0]  
[1]  
[11:2]  
[23:12]  
X
X
X
X
XV7POL_8  
XV8POL_8  
UNUSED  
VPAT8 XV7 Start Polarity  
VPAT8 XV8 Start Polarity  
Unused  
XV78LEN_8  
Total Length of XV7 and XV8 Pattern for VPAT8  
41  
42  
43  
44  
[11:0]  
[23:12]  
X
X
XV7TOG1_8  
XV7TOG2_8  
XV7 Toggle Position 1  
XV7 Toggle Position 2  
[11:0]  
[23:12]  
X
X
XV7TOG3_8  
XV8TOG1_8  
XV7 Toggle Position 3  
XV8 Toggle Position 1  
[11:0]  
[23:12]  
X
X
XV8TOG2_8  
XV8TOG3_8  
XV8 Toggle Position 2  
XV8 Toggle Position 3  
[11:0]  
[23:12]  
X
X
XV7TOG4_8  
XV8TOG4_8  
XV7 Toggle Position 4  
XV8 Toggle Position 4  
45  
46  
47  
[23:0]  
[23:0]  
[23:0]  
X
X
X
UNUSED  
UNUSED  
UNUSED  
Unused  
Unused  
Unused  
Table 83. XV7 and XV8 Pattern Group 9 (VPAT9) Registers  
Address  
Data Bit Content  
Default Value  
Register Name  
Register Description  
48  
[0]  
[1]  
[11:2]  
[23:12]  
X
X
X
X
XV7POL_9  
XV8POL_9  
UNUSED  
VPAT9 XV7 Start Polarity  
VPAT9 XV8 Start Polarity  
Unused  
XV78LEN_9  
Total Length of XV7 and XV8 Pattern for VPAT9  
49  
4A  
4B  
4C  
[11:0]  
[23:12]  
X
X
XV7TOG1_9  
XV7TOG2_9  
XV7 Toggle Position 1  
XV7 Toggle Position 2  
[11:0]  
[23:12]  
X
X
XV7TOG3_9  
XV8TOG1_9  
XV7 Toggle Position 3  
XV8 Toggle Position 1  
[11:0]  
[23:12]  
X
X
XV8TOG2_9  
XV8TOG3_9  
XV8 Toggle Position 2  
XV8 Toggle Position 3  
[11:0]  
[23:12]  
X
X
XV7TOG4_9  
XV8TOG4_9  
XV7 Toggle Position 4  
XV8 Toggle Position 4  
4D  
4E  
4F  
[23:0]  
[23:0]  
[23:0]  
X
X
X
UNUSED  
UNUSED  
UNUSED  
Unused  
Unused  
Unused  
Table 84. XV7 and XV8 Vertical Sequence 0 Registers  
Address  
Data Bit Content  
Default Value  
Register Name  
Register Description  
50  
[0]  
X
HOLD_0  
0: Vertical Masking Operation, 1: Hold Area instead of  
Vertical Masking  
[11:1]  
[23:12]  
X
X
UNUSED  
XV78START_0  
Unused  
Start Position for XV7 and XV8  
51  
52  
[11:0]  
[23:12]  
X
X
XV78REPO_0  
XV78REPE_0  
Number of Selected XV7, XV8 Repetitions for Odd Lines  
Number of Selected XV7, XV8 Repetitions for Even Lines  
[0]  
X
XV78HOLDEN_0  
0: No Hold Area for XV7 and XV8,1: Enable Hold Area for  
XV7 and XV8  
Unused  
[23:1]  
[23:0]  
X
X
UNUSED  
UNUSED  
53  
Unused  
Rev. A | Page 90 of 96  
1...87888990919293...96

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