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AD9915-PCBZ

更新时间： 2024-02-03 04:54:46
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
48页 877K
描述
2.5 GSPS Direct Digital Synthesizer with 12-Bit DAC

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AD9915-PCBZ 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active包装说明：,
针数：88Reach Compliance Code：compliant
ECCN代码：3A001.A.13.BHTS代码：8542.39.00.01
风险等级：2.16Is Samacsys：N
商用集成电路类型：TONE/MUSIC SYNTHESIZERJESD-609代码：e3
湿度敏感等级：3端子面层：Tin (Sn)
Base Number Matches：1

AD9915-PCBZ 数据手册

 浏览型号AD9915-PCBZ的Datasheet PDF文件第6页浏览型号AD9915-PCBZ的Datasheet PDF文件第7页浏览型号AD9915-PCBZ的Datasheet PDF文件第8页浏览型号AD9915-PCBZ的Datasheet PDF文件第10页浏览型号AD9915-PCBZ的Datasheet PDF文件第11页浏览型号AD9915-PCBZ的Datasheet PDF文件第12页 
Data Sheet  
AD9915  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
D17  
D16  
D15/A7  
D14/A6  
D13/A5  
DVDD (1.8V)  
DGND  
1
2
3
4
5
6
7
8
9
66 OSK  
65 DROVER  
64 DRHOLD  
63 DRCTL  
62 SYNC_IN  
61 SYNC_OUT  
60 AVDD (3.3V)  
59 REF  
58 LOOP_FILTER  
57 AVDD (1.8V)  
56 AVDD (1.8V)  
55 REF CLK  
D12/A4  
D11/A3  
D10/A2 10  
D9/A1 11  
D8/A0 12  
AD9915  
TOP VIEW  
(Not to Scale)  
D7 13  
D6 14  
D5 15  
54  
REF CLK  
53 AVDD (3.3V)  
52 AVDD (3.3V)  
51 AGND  
DVDD_I/O (3.3V) 16  
DGND 17  
50 AVDD (3.3V)  
49 AGND  
48 DAC_RSET  
47 AVDD (3.3V)  
46 AGND  
D4/SYNCIO 18  
D3/SDO 19  
D2/SDIO/WR 20  
D1/SCLK/RD 21  
D0/CS/PWD 22  
45 DAC_BP  
NOTES  
1. THE EPAD MUST BE SOLDERED TO GROUND.  
Figure 3. Pin Configuration  
Table 5. Pin Function Descriptions  
Pin No. Mnemonic  
1, 2, 13 to 15, 68 D5 to D7, D16 to  
I/O1 Description  
I/O  
Parallel Port Pins. The 32-bit parallel port offers the option for serial or parallel programming  
of the internal registers. In addition, the parallel port can be configured to provide direct FSK,  
PSK, or ASK (or combinations thereof) modulation data. The 32-bit parallel port configuration  
is set by the state of the four function pins (F0 to F3).  
to 72, 75 to 81,  
87, 88  
D31, D27 to D31  
3
D15/A7  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
Parallel Port Pin/Address Line. The state of the F0 to F3 function pins determines if this pin  
acts as a line for direct FSK, PSK, or ASK data or as an address line for programming the  
internal registers.  
Parallel Port Pin/Address Line. The state of the F0 to F3 function pins determines if this pin  
acts as a line for direct FSK, PSK, or ASK data or as an address line for programming the  
internal registers.  
Parallel Port Pin/Address Line. The state of the F0 to F3 function pins determines if this pin  
acts as a line for direct FSK, PSK, or ASK data or as an address line for programming the  
internal registers.  
Parallel Port Pin/Address Line. The state of the F0 to F3 function pins determines if this pin  
acts as a line for direct FSK, PSK, or ASK data or as an address line for programming the  
internal registers.  
Parallel Port Pin/Address Line. The state of the F0 to F3 function pins determines if this pin  
acts as a line for direct FSK, PSK, or ASK data or as an address line for programming the  
internal registers.  
Parallel Port Pin/Address Line. Multipurpose pin depending on the state of the function pins  
(F0 to F3). The state of the F0 to F3 function pins determines if this pin acts as a line for direct  
FSK, PSK, or ASK data or as an address line for programming the internal registers.  
Parallel Port Pin/Address Line. Multipurpose pin depending on the state of the function pins  
(F0 to F3). The state of the F0 to F3 function pins determines if this pin acts as a line for direct  
FSK, PSK, or ASK data or as an address line for programming the internal registers.  
4
D14/A6  
5
D13/A5  
8
D12/A4  
9
D11/A3  
10  
11  
D10/A2  
D9/A1  
Rev. A | Page 9 of 48  
 
1...6789101112...48

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