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AD9888KSZ-140

更新时间： 2024-01-28 09:23:59

品牌	Logo	应用领域
亚德诺 - ADI		消费电路商用集成电路
页数	文件大小	规格书
36页	501K
描述
100 MSPS/140 MSPS/170 MSPS Analog Flat Panel Interface

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技术参数
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AD9888KSZ-140 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	QFP
包装说明：	FQFP,	针数：	128
Reach Compliance Code：	unknown	风险等级：	5.07
Is Samacsys：	N	商用集成电路类型：	CONSUMER CIRCUIT
JESD-30 代码：	R-PQFP-G128	JESD-609代码：	e3
长度：	20 mm	湿度敏感等级：	3
功能数量：	1	端子数量：	128
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	FQFP
封装形状：	RECTANGULAR	封装形式：	FLATPACK, FINE PITCH
峰值回流温度（摄氏度）：	260	认证状态：	COMMERCIAL
座面最大高度：	3.4 mm	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	3 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	MATTE TIN	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	40	宽度：	14 mm
Base Number Matches：	1

AD9888KSZ-140 数据手册

Data Sheet

AD9888

Table 4. Pin Function Descriptions

Mnemonic

Description

Inputs

R_AIN

G_AIN

B_AIN

R_AIN

G_AIN

B_AIN

Channel ± Analog Input for Red.

Channel ± Analog Input for Green.

Channel ± Analog Input for Blue.

Channel 1 Analog Input for Red.

Channel 1 Analog Input for Green.

Channel 1 Analog Input for Blue.

These high impedance inputs accept red, green, and blue channel graphics signals, respectively. The six channels are

identical and can be used for any color; colors are assigned for convenient reference. They accommodate input signals

ranging from ±.5 V to 1.± V full scale. Signals should be ac-coupled to these pins to support clamp operation.

HSYNC±

HSYNC1

Channel ± Horizontal Sync Input.

Channel 1 Horizontal Sync Input.

These inputs receive a logic signal that establishes the horizontal timing reference and provides the frequency reference

for pixel clock generation. The logic sense of this pin is controlled by the HSYNC input polarity control (Register ±x±E, Bit 6).

Only the leading edge of HSYNC is used by the PLL. The trailing edge is used for clamp timing only. When the HSYNC input

polarity control = ±, the falling edge of HSYNC is used. When the HSYNC polarity control = 1, the rising edge is active. The

input includes a Schmitt trigger for noise immunity, with a nominal input threshold of 1.5 V.

VSYNC±

VSYNC1

Channel ± Vertical Sync Input.

Channel 1 Vertical Sync Input.

These are the inputs for vertical sync.

Channel ± Sync-on-Green Input.

Channel 1 Sync-on-Green Input.

SOGIN±

SOGIN1

These inputs are provided to assist in processing signals with embedded sync, typically on the green channel. These pins

are connected to a high speed comparator with an internally generated, variable threshold level, which is nominally set to

±.15 V above the negative peak of the input signal. When connected to an ac-coupled graphics signal with embedded

sync, these pins produce a noninverting digital output on SOGOUT. This output is usually a composite sync signal,

containing both vertical and horizontal sync information. When not used, these inputs should be left unconnected. For

more details about this function and how it should be configured, see the Sync-on-Green Input section.

CLAMP

COAST

External Clamp Input.

This logic input can be used to define the time during which the input signal is clamped to the reference dc level (to

ground for RGB or to midscale for YUV). It should be used when the reference dc level is known to be present on the

analog input channels, typically during a period following HSYNC, called the back porch, when a good black reference is

provided. The CLAMP pin is enabled by setting the external clamp control (Register ±x±F, Bit ꢀ) to 1 (default is ±). When

disabled, this pin is ignored and the clamp timing is determined internally by counting a delay and duration from the

trailing edge of the HSYNC input. The logic sense of this pin is controlled by the clamp polarity control (Register ±x±F, Bit 6).

When not used, this pin should be grounded and the external clamp should be programmed to ±.

Clock Generator Coast Input (optional).

This input can be used to stop the pixel clock generator from synchronizing with HSYNC while continuing to produce a

clock at its current frequency and phase. This is useful when processing signals from sources that fail to produce horizontal

sync pulses during the vertical interval or that include equalization pulses. The COAST signal is usually not required for PC

generated signals. The logic sense of this pin is controlled by the coast polarity control (Register ±x±F, Bit 3). When this pin

is not used, either ground the pin and program the coast polarity to 1 or tie the pin high (to V_Dthrough a 1± kΩ resistor)

and program the coast polarity to ±. The coast polarity register bit defaults to 1 at power-up.

CKEXT

CKINV

External Clock Input (optional).

This pin can be used to provide an external clock to the AD9888 in place of the clock internally generated from HSYNC. The

external clock is enabled by programming the external clock select bit (Register ±x15, Bit ±) to 1. When an external clock is

used, all other internal functions operate normally. When not used, this pin should be tied through a 1± kΩ resistor to

ground, and the external clock register should be programmed to ±. The clock phase adjustment still operates when an

external clock source is used.

Sampling Clock Inversion (optional).

This pin can be used to invert the pixel sampling clock, which has the effect of shifting the sampling phase 18±°. This

supports the alternate pixel sampling mode, wherein higher frequency input signals (up to 41± MSPS) can be captured by

first sampling the odd pixels, and then capturing the even pixels on the subsequent frame. This pin should be used only

during blanking intervals (typically vertical blanking) because it might produce several samples of corrupted data during

the phase shift. When not in use, this pin should be grounded.

Rev. C | Page 9 of 36

1...6 7 8910 11 12...36

中文翻译

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AD9888KSZ-140 替代型号

型号	品牌	替代类型	描述	数据表
AD9888KS-140	ADI	完全替代	100/140/170/205 MSPS Analog Flat Panel Interface

与AD9888KSZ-140相关器件

型号	品牌	获取价格	描述	数据表
AD9888KSZ-170	ADI	获取价格	100 MSPS/140 MSPS/170 MSPS Analog Flat Panel Interface
AD9888KSZ-170	ROCHESTER	获取价格	SPECIALTY CONSUMER CIRCUIT, PQFP128, PLASTIC, MQFP-128
AD9888KSZ-205	ADI	获取价格	IC SPECIALTY CONSUMER CIRCUIT, PQFP128, PLASTIC, MQFP-128, Consumer IC:Other
AD9889	ADI	获取价格	HIGH PERFORMANCE HDMI-TM / DVI TRANSMITTER
AD9889A	ADI	获取价格	High Performance HDMI/DVI Transmitter
AD9889ABBCZ-80	ADI	获取价格	High Performance HDMI/DVI Transmitter
AD9889ABBCZ-80	ROCHESTER	获取价格	SPECIALTY CONSUMER CIRCUIT, PBGA76, 6 X 6 MM, 1.40 MM HEIGHT, LEAD FREE, MO-225, BGA-76
AD9889ABBCZRL-80	ADI	获取价格	High Performance HDMI/DVI Transmitter
AD9889B	ADI	获取价格	High Performance HDMI/DVI Transmitter
AD9889B/PCB	ADI	获取价格	High Performance HDMI/DVI Transmitter

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