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AD9877-EB PDF预览

AD9877-EB

更新时间: 2024-01-22 12:00:25
品牌 Logo 应用领域
亚德诺 - ADI 调制解调器电缆调制解调器
页数 文件大小 规格书
36页 687K
描述
Mixed-Signal Front End Set-Top Box, Cable Modem

AD9877-EB 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFP包装说明:METRIC, QFP-100
针数:100Reach Compliance Code:compliant
ECCN代码:5A991.GHTS代码:8542.39.00.01
风险等级:5.84JESD-30 代码:R-PQFP-G100
JESD-609代码:e0长度:20 mm
功能数量:1端子数量:100
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装形状:RECTANGULAR封装形式:FLATPACK
峰值回流温度(摄氏度):220认证状态:Not Qualified
座面最大高度:3.4 mm标称供电电压:3.3 V
表面贴装:YES技术:CMOS
电信集成电路类型:TELECOM CIRCUIT温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.65 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:14 mm

AD9877-EB 数据手册

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AD9877  
TABLE OF CONTENTS  
Specifications..................................................................................... 4  
MSB/LSB Transfers .................................................................... 22  
Notes on Serial Port Operation ................................................ 23  
Transmit Path (Tx) ......................................................................... 24  
Transmit Timing......................................................................... 24  
Data Assembler........................................................................... 24  
Half-Band Filters (HBFs) .......................................................... 24  
Cascaded Integrator-Comb (CIC) Filter................................. 24  
Combined Filter Response........................................................ 25  
Tx Signal Level Considerations................................................ 27  
Tx Throughput and Latency..................................................... 27  
Digital-to-Analog Converter .................................................... 27  
Absolute Maximum Ratings............................................................ 7  
Explanation of Test Levels........................................................... 7  
Thermal Characteristics .............................................................. 7  
ESD Caution.................................................................................. 7  
Pin Configuration and Function Descriptions............................. 8  
Typical Performance Characteristics ........................................... 10  
Terminology .................................................................................... 12  
Theory of Operation ...................................................................... 13  
Transmit Section......................................................................... 13  
Clock and Oscillator Circuitry ................................................. 14  
Programmable Clock Output REFCLK................................... 15  
Reset and Transmit Power-Down ............................................ 16  
Σ-Δ Outputs ................................................................................ 17  
Register Map and Bit Definitions ................................................. 18  
Register 0x00—Initialization .................................................... 19  
Register 0x01—Clock Configuration....................................... 19  
Register 0x02—Power-Down.................................................... 19  
Register 0x03–0x06—Σ-Δ Control Words.............................. 19  
Register 0x08—ADC Clock Configuration ............................ 20  
Register 0x0C—Die Revision.................................................... 20  
Register 0x0D—Tx Frequency Tuning Words LSBs.............. 20  
Register 0x0E—DAC Gain Control ......................................... 20  
Register 0x0F—Tx Path Configuration................................... 20  
Registers 0x10–0x1F—Burst Parameter.................................. 20  
Serial Interface for Register Control ............................................ 22  
General Operation of the Serial Interface............................... 22  
Instruction Byte .......................................................................... 22  
Serial Interface Port Pin Description....................................... 22  
Programming the AD8321/AD8325 or AD8322/AD8327 Cable  
Driver Amplifier Gain Control..................................................... 29  
Receive Path (Rx) ........................................................................... 30  
ADC Theory of Operation........................................................ 30  
Receive Timing ........................................................................... 30  
Driving the Analog Inputs ........................................................ 30  
Op Amp Selection Guide .......................................................... 31  
ADC Differential Inputs............................................................ 31  
ADC Voltage References ........................................................... 32  
PCB Design Considerations.......................................................... 33  
Component Placement.............................................................. 33  
Power Planes and Decoupling .................................................. 33  
Ground Planes ............................................................................ 33  
Signal Routing............................................................................. 34  
Outline Dimensions....................................................................... 35  
Ordering Guide .......................................................................... 35  
Rev. B | Page 2 of 36  

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