Analog/HDMI
Dual Display Interface
AD9880
FUNCTIONAL BLOCK DIAGRAM
ANALOG INTERFACE
FEATURES
Analog/HDMI dual interface
Supports high bandwidth digital content protection
RGB-to-YCbCr 2-way color conversion
Automated clamping level adjustment
1.8 V/3.3 V power supply
100-lead LQFP Pb-free package
RGB and YCbCr output formats
Analog interface
R/G/B OR YPbPr
R/G/B OR YPbPr
R/G/B 8X3
IN0
2:1
MUX
CLAMP
A/D
or YCbCr
IN1
HSYNC 0
HSYNC 1
2:1
MUX
2
DATACK
HSOUT
HSYNC 0
HSYNC 1
2:1
MUX
SYNC
PROCESSING
AND
VSOUT
2:1
MUX
SOGIN 0
SOGIN 1
SOGOUT
CLOCK
GENERATION
COAST
FILT
REFOUT
REFIN
REF
R/G/B 8X3
CKINV
CKEXT
8-bit triple ADC
YCbCr (4:2:2
OR 4:4:4)
100 MSPS maximum conversion rate
Macrovision® detection
2:1 input mux
Full sync processing
Sync detect for hot plugging
Midscale clamping
Digital video interface
HDMI v 1.1, DVI v 1.0
150 MHz HDMI receiver
2
SCL
SDA
DATACK
SERIAL REGISTER
AND
POWER MANAGEMENT
HSOUT
VSOUT
SOGOUT
DE
DIGITAL INTERFACE
R/G/B 8X3
OR YCbCr
RX0+
RX0–
2
4
DATACK
DE
RX1+
RX1–
RX2+
RX2–
RXC+
RXC–
H
SYNC
V
HDMI RECEIVER
SYNC
Supports high bandwidth digital content protection
(HDCP 1.1)
SPDIF OUT
8-CHANNEL
I S OUT
R
Digital audio interface
HDMI 1.1-compatible audio interface
S/PDIF (IEC90658-compatible) digital audio output
Multichannel I2S audio output (up to 8 channels)
2
TERM
SCLK
MCLK
LRCLK
MCL
MDA
HDCP
DDCSCL
DDCSDA
AD9880
Figure 1.
APPLICATIONS
Advanced TV
HDTV
Projectors
LCD monitor
CMOS outputs can be powered from 1.8 V to 3.3 V. The
AD9880’s on-chip PLL generates a pixel clock from Hsync. Pixel
clock output frequencies range from 12 MHz to 150 MHz. PLL
clock jitter is typically less than 700 ps p-p at 150 MHz. The
AD9880 also offers full sync processing for composite sync and
sync-on-green (SOG) applications.
GENERAL DESCRIPTION
The AD9880 offers designers the flexibility of an analog interface
and high definition multimedia interface (HDMI) receiver inte-
grated on a single chip. Also included is support for high band-
width digital content protection (HDCP).
Digital Interface
The AD9880 contains a HDMI 1.1-compatible receiver and sup-
ports all HDTV formats (up to 1080 p and 720 p) and display
resolutions up to SXGA (1280 × 1024 @75 Hz). The receiver
features an intrapair skew tolerance of up to one full clock cycle.
With the inclusion of HDCP, displays can now receive encrypted
video content. The AD9880 allows for authentication of a video
receiver, decryption of encoded data at the receiver, and renewa-
bility of the authentication during transmission, as specified by the
HDCP v 1.1 protocol.
Analog Interface
The AD9880 is a complete 8-bit 150 MSPS monolithic analog inter-
face optimized for capturing component video (YPbPr) and RGB
graphics signals. Its 150 MSPS encode rate capability and full power
analog bandwidth of 330 MHz supports all HDTV formats (up to
1080 p) and FPD resolutions up to SXGA (1280 × 1024 @ 75 Hz).
The analog interface includes a 150 MHz triple ADC with internal
1.25 V reference, a phase-locked loop (PLL), and programmable
gain, offset, and clamp control. The user provides only 1.8 V and
3.3 V power supplies, analog input, and Hsync. Three-state
Fabricated in an advanced CMOS process, the AD9880 is provided
in a space-saving, 100-lead LQFP surface-mount Pb-free plastic
package and is specified over the 0°C to 70°C temperature range.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
© 2005 Analog Devices, Inc. All rights reserved.
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